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  • From: sindi keesan <keesan AT sdf.lonestar.org>
  • To: baslinux AT lists.ibiblio.org
  • Subject: Re: [BL] Re: Interrupts and isapnp
  • Date: Tue, 7 Jun 2005 17:00:05 +0000 (UTC)

I still cannot get my pnp AWE32 card to initialize in DOS and when I try to insmod awe_wave: AWE32: not detected.

So I ran pnpdump > /etc/isapnp.conf
which told me a lot of things about interrupts, and I probably need to
edit the file (see below).

isapnp /etc/isapnp.conf
Board 1 has Identity 15 00 01.... CTL0045 Serial No 85877 [checksum 15]

Here is isapnp.conf produced by pnpdump. It is enough to scare me off pnp cards for a few years, but I think I have to uncomment some things. Please help!!!!!


# $Id: pnpdump.c,v 1.21 1999/12/09 22:28:33 fox Exp $
# Release isapnptools-1.21 (library isapnptools-1.21)
# # This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
# # For details of the output file format, see isapnp.conf(5)
# # For latest information and FAQ on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
# # Compiler flags: -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR
# (for library: -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR)
# # Trying port address 0273
# Board 1 has serial identifier 15 00 01 4f 75 45 00 8c 0e

# (DEBUG)
(READPORT 0x0273)
(ISOLATE PRESERVE)
(IDENTIFY *)
(VERBOSITY 2)
(CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING

!!!!!!What am I supposed to do about this CONFLICT line? Is this what is causing the card not to initialize in DOS as AWE32? It works in DOS with io 220 mpu 330 irq5 dma 1 dma16 5, except for AWE. But the following sections suggest that I should perhaps set to mpu 300 and dma 0 not 330 and 1, to avoid conflicts? It came set to something like mpu 300 irq 10 dma 3 and 5 (or maybe 1 and 7).

In DOS I had to disable the game port to avoid some conflict (io I think).

# Card 1: (serial identifier 15 00 01 4f 75 45 00 8c 0e)
# Vendor Id CTL0045, Serial Number 85877, checksum 0x15.
# Version 1.0, Vendor version 1.0
# ANSI string -->Creative SB AWE32 PnP<--
#
# Logical device id CTL0031
# Device supports vendor reserved register @ 0x38
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed
if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL0045/85877 (LD 0
# ANSI string -->Audio<--

# Multiple choice time, choose one only !

# Start dependent functions: priority preferred
# IRQ 5.
Do I uncomment this line?

# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
And this line?

# Next DMA channel 5.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
And this line?

# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0220
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
And this line for io?

# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0330
# Maximum IO base address 0x0330
# IO base alignment 1 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0330))
And this line (for mpu io) even if I don't have a midi device?

# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
Is this for FM synthesis and do I need it for AWE?


It looks like the following might be causing the AWE function to share
the interrupts and DMA of the regular part of the card - so I also
uncomment the parts with ( here?

# Start dependent functions: priority acceptable
# IRQ 5, 7 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode

I set the card to DMA 1 - should it be 0 instead?

# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2

I have changed this card to MPU 0x330 from 0x300 - should I change it
back to 300 instead? Or change something else in ctpnp.cfg?

# (IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

This looks like a repeat of the above - what do I do with it?

# Start dependent functions: priority acceptable
# IRQ 5, 7 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

# Start dependent functions: priority functional
# IRQ 5, 7 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

# Start dependent functions: priority functional
# IRQ 5, 7 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

# Start dependent functions: priority functional
# IRQ 5, 7 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

# Start dependent functions: priority functional
# IRQ 5, 7, 10 or 11.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

# End dependent functions
(NAME "CTL0045/85877[0]{Audio }")
# (ACT Y)
))
#
# Logical device id PNPffff
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed
if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL0045/85877 (LD 1
# ANSI string -->Reserved<--
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0100
# Maximum IO base address 0x03f8
# IO base alignment 8 bytes
# Number of IO addresses required: 1
# (IO 0 (SIZE 1) (BASE 0x0100))
(NAME "CTL0045/85877[1]{Reserved }")

I am supposed to uncomment the following line when happy.
I am not happy about this conf file - it is very confusing.

# (ACT Y)
))
#
# Logical device id CTL0021
# Device supports vendor reserved register @ 0x38
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed
if required
# Don't forget to uncomment the activate (ACT Y) when happy


Can I comment out this wavetable section? I think it is a 'waveblaster'
card that plugs into this card, which I do not have.
Or is this the AWE part?

(CONFIGURE CTL0045/85877 (LD 2
# ANSI string -->WaveTable<--

# Multiple choice time, choose one only !

# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0620
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 0 (SIZE 4) (BASE 0x0620))

# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0680
# IO base alignment 32 bytes
# Number of IO addresses required: 4
# (IO 0 (SIZE 4) (BASE 0x0620))

# End dependent functions
(NAME "CTL0045/85877[2]{WaveTable }")
# (ACT Y)
))
#
# Logical device id CTL7001
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed
if required
# Don't forget to uncomment the activate (ACT Y) when happy

I want to DISABLE the game port - how? Do I comment it out?

(CONFIGURE CTL0045/85877 (LD 3
# Compatible device id PNPb02f
# ANSI string -->Game<--
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0200
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0200))
(NAME "CTL0045/85877[3]{Game }")
# (ACT Y)
))
#
# Logical device id CTL0051
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed
if required
# Don't forget to uncomment the activate (ACT Y) when happy

I have no idea what to do with stereo enhance - can I comment it out too?

(CONFIGURE CTL0045/85877 (LD 4
# ANSI string -->StereoEnhance<--
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0100
# Maximum IO base address 0x03f8
# IO base alignment 8 bytes
# Number of IO addresses required: 1
# (IO 0 (SIZE 1) (BASE 0x0100))
(NAME "CTL0045/85877[4]{StereoEnhance }")
# (ACT Y)
))
# End tag... Checksum 0x00 (OK)

# Returns all cards to the "Wait for Key" state
(WAITFORKEY)





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