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  • From: "James K. Lowden" <jklowden AT schemamania.org>
  • To: TDS Development Group <freetds AT franklin.metalab.unc.edu>
  • Subject: make easy (again)
  • Date: Fri, 5 Jul 2002 14:10:18 -0400


Makefilers,

Further testing reveals former testing was incomplete. I came across a
couple of Gnuism in the FreeTDS Makefile's. The same fellow who sent the
previous patches had some questions, which I couldn't answer. I hope
someone here (Brian, probably) can. See below (my comments are prepended
with ">").

--jkl

> "make include" relies on the Implicit Variable $(RM). I don't know why;
> many of the Makefile's don't do that.

autoconf/automake can be used to automatically create a RM make variable
in all of the generated Makefiles. I'll work on it and send you a patch.

> The src/tds/Makefile is more baffling. It gets stuck on "mem.lo". I've
> attached the behavior. It looks to me like BSD make can't find this
> pattern rule:
>
> %.o: %.c
> @echo '$(COMPILE) -c $<'; \
> $(COMPILE) -Wp,-MD,.deps/$(*F).pp -c $<
> @-cp .deps/$(*F).pp .deps/$(*F).P; \
> tr ' ' '\012' < .deps/$(*F).pp \
> | sed -e 's/^\\$$//' -e '/^$$/ d' -e '/:$$/ d' -e 's/$$/ :/' \
> >> .deps/$(*F).P; \
> rm .deps/$(*F).pp
>
> I can't find anything in src/tds/Makefile.am that about that.

"%.o: %.c" is a GNU make construct. Actually, that whole rule looks
pretty evil...can you explain what it's trying to do? From my quick read
of it, it looks like the rule is trying to dynamically update the
dependencies for the Makefile. This is quite hard to do portably. Most
other software rely on a separate program "makedepend" and an appropriate
"depend" target in the Makefile to do this statically whenever the
developer thinks that it needs to be run. I recommend that freetds do
this as well, unless there is some technical reason why the status quo
exists.



  • make easy (again), James K. Lowden, 07/05/2002

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