New commits:
commit a3dc0caaa3ec40aefbe88411fd8236e955608f29
Author: Pavel Vinogradov <public AT sourcemage.org>
Commit: Pavel Vinogradov <public AT sourcemage.org>
http/firefox: fixed compilation with recent rust
diff --git a/http/firefox/HISTORY b/http/firefox/HISTORY
index 93fb40c..a74a35c 100644
--- a/http/firefox/HISTORY
+++ b/http/firefox/HISTORY
@@ -1,3 +1,7 @@
+2024-05-20 Pavel Vinogradov <public AT sourcemage.org>
+ *
patches/0001-Bug-1882209-Update-encoding_rs-to-0.8.34-to-deal-wit.patch:
+ added patch from Arch Linux to compile with recent rust
+
2024-05-14 Pavel Vinogradov <public AT sourcemage.org>
* DETAILS: version 126.0, SECURITY_PATCH++
* patches/*: updated
diff --git
a/http/firefox/patches/0001-Bug-1882209-Update-encoding_rs-to-0.8.34-to-deal-wit.patch
b/http/firefox/patches/0001-Bug-1882209-Update-encoding_rs-to-0.8.34-to-deal-wit.patch
new file mode 100644
index 0000000..31a3823
--- /dev/null
+++
b/http/firefox/patches/0001-Bug-1882209-Update-encoding_rs-to-0.8.34-to-deal-wit.patch
@@ -0,0 +1,23370 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Henri Sivonen <hsivonen AT hsivonen.fi>
+Date: Tue, 30 Apr 2024 07:29:44 +0000
+Subject: [PATCH] Bug 1882209 - Update encoding_rs to 0.8.34 to deal with
rustc
+ changes. r=glandium,supply-chain-reviewers
+
+Differential Revision: https://phabricator.services.mozilla.com/D207167
+---
+ .cargo/config.toml.in | 5 +
+ Cargo.lock | 25 +-
+ Cargo.toml | 1 +
+ config/makefiles/rust.mk | 2 +-
+ supply-chain/audits.toml | 13 +
+ supply-chain/config.toml | 4 +
+ supply-chain/imports.lock | 7 +
+ .../any_all_workaround/.cargo-checksum.json | 1 +
+ .../Cargo.toml | 30 +-
+ .../LICENSE-APACHE | 0
+ .../LICENSE-MIT | 0
+ .../rust/any_all_workaround/LICENSE-MIT-QCMS | 0
+ third_party/rust/any_all_workaround/README.md | 13 +
+ .../rust/any_all_workaround}/build.rs | 0
+ .../rust/any_all_workaround/src/lib.rs | 110 ++
+ .../rust/encoding_rs/.cargo-checksum.json | 2 +-
+ third_party/rust/encoding_rs/Cargo.toml | 19 +-
+ third_party/rust/encoding_rs/README.md | 34 +-
+ third_party/rust/encoding_rs/src/ascii.rs | 388 ++++-
+ third_party/rust/encoding_rs/src/handles.rs | 36 +-
+ third_party/rust/encoding_rs/src/lib.rs | 13 +-
+ third_party/rust/encoding_rs/src/mem.rs | 18 +-
+ .../rust/encoding_rs/src/simd_funcs.rs | 146 +-
+ .../rust/encoding_rs/src/single_byte.rs | 64 +-
+ .../rust/encoding_rs/src/x_user_defined.rs | 10 +-
+ .../rust/packed_simd/.cargo-checksum.json | 1 -
+ third_party/rust/packed_simd/Cargo.toml | 83 -
+ third_party/rust/packed_simd/README.md | 144 --
+ third_party/rust/packed_simd/bors.toml | 3 -
+ third_party/rust/packed_simd/build.rs | 6 -
+ third_party/rust/packed_simd/ci/all.sh | 71 -
+ .../packed_simd/ci/android-install-ndk.sh | 21 -
+ .../packed_simd/ci/android-install-sdk.sh | 60 -
+ .../rust/packed_simd/ci/android-sysimage.sh | 56 -
+ third_party/rust/packed_simd/ci/benchmark.sh | 32 -
+ .../ci/deploy_and_run_on_ios_simulator.rs | 176 ---
+ .../docker/aarch64-linux-android/Dockerfile | 47 -
+ .../aarch64-unknown-linux-gnu/Dockerfile | 14 -
+ .../arm-unknown-linux-gnueabi/Dockerfile | 15 -
+ .../arm-unknown-linux-gnueabihf/Dockerfile | 13 -
+ .../docker/armv7-linux-androideabi/Dockerfile | 47 -
+ .../armv7-unknown-linux-gnueabihf/Dockerfile | 13 -
+ .../docker/i586-unknown-linux-gnu/Dockerfile | 7 -
+ .../docker/i686-unknown-linux-gnu/Dockerfile | 7 -
+ .../docker/mips-unknown-linux-gnu/Dockerfile | 13 -
+ .../mips64-unknown-linux-gnuabi64/Dockerfile | 10 -
+ .../Dockerfile | 10 -
+ .../mipsel-unknown-linux-musl/Dockerfile | 25 -
+ .../powerpc-unknown-linux-gnu/Dockerfile | 13 -
+ .../powerpc64-unknown-linux-gnu/Dockerfile | 17 -
+ .../powerpc64le-unknown-linux-gnu/Dockerfile | 11 -
+ .../docker/s390x-unknown-linux-gnu/Dockerfile | 20 -
+ .../sparc64-unknown-linux-gnu/Dockerfile | 18 -
+ .../thumbv7neon-linux-androideabi/Dockerfile | 47 -
+ .../Dockerfile | 13 -
+ .../docker/wasm32-unknown-unknown/Dockerfile | 39 -
+ .../ci/docker/x86_64-linux-android/Dockerfile | 31 -
+ .../Dockerfile | 16 -
+ .../x86_64-unknown-linux-gnu/Dockerfile | 10 -
+ third_party/rust/packed_simd/ci/dox.sh | 27 -
+ .../rust/packed_simd/ci/linux-s390x.sh | 18 -
+ .../rust/packed_simd/ci/linux-sparc64.sh | 17 -
+ third_party/rust/packed_simd/ci/lld-shim.rs | 11 -
+ .../rust/packed_simd/ci/max_line_width.sh | 17 -
+ third_party/rust/packed_simd/ci/run-docker.sh | 38 -
+ third_party/rust/packed_simd/ci/run.sh | 99 --
+ .../rust/packed_simd/ci/run_examples.sh | 51 -
+ .../rust/packed_simd/ci/runtest-android.rs | 45 -
+ .../rust/packed_simd/ci/setup_benchmarks.sh | 7 -
+ .../rust/packed_simd/ci/test-runner-linux | 24 -
+ third_party/rust/packed_simd/contributing.md | 67 -
+ .../rust/packed_simd/perf-guide/book.toml | 12 -
+ .../packed_simd/perf-guide/src/SUMMARY.md | 21 -
+ .../rust/packed_simd/perf-guide/src/ascii.css | 4 -
+ .../perf-guide/src/bound_checks.md | 22 -
+ .../perf-guide/src/float-math/approx.md | 8 -
+ .../perf-guide/src/float-math/fma.md | 6 -
+ .../perf-guide/src/float-math/fp.md | 3 -
+ .../perf-guide/src/float-math/svml.md | 7 -
+ .../perf-guide/src/introduction.md | 26 -
+ .../packed_simd/perf-guide/src/prof/linux.md | 107 --
+ .../packed_simd/perf-guide/src/prof/mca.md | 100 --
+ .../perf-guide/src/prof/profiling.md | 14 -
+ .../src/target-feature/attribute.md | 5 -
+ .../perf-guide/src/target-feature/features.md | 13 -
+ .../perf-guide/src/target-feature/inlining.md | 5 -
+ .../perf-guide/src/target-feature/practice.md | 31 -
+ .../perf-guide/src/target-feature/runtime.md | 5 -
+ .../src/target-feature/rustflags.md | 77 -
+ .../perf-guide/src/vert-hor-ops.md | 76 -
+ third_party/rust/packed_simd/rust-toolchain | 1 -
+ third_party/rust/packed_simd/rustfmt.toml | 5 -
+ third_party/rust/packed_simd/src/api.rs | 309 ----
+ .../rust/packed_simd/src/api/bit_manip.rs | 129 --
+ .../rust/packed_simd/src/api/bitmask.rs | 79 -
+ third_party/rust/packed_simd/src/api/cast.rs | 108 --
+ .../rust/packed_simd/src/api/cast/macros.rs | 82 -
+ .../rust/packed_simd/src/api/cast/v128.rs | 302 ----
+ .../rust/packed_simd/src/api/cast/v16.rs | 68 -
+ .../rust/packed_simd/src/api/cast/v256.rs | 298 ----
+ .../rust/packed_simd/src/api/cast/v32.rs | 132 --
+ .../rust/packed_simd/src/api/cast/v512.rs | 209 ---
+ .../rust/packed_simd/src/api/cast/v64.rs | 208 ---
+ third_party/rust/packed_simd/src/api/cmp.rs | 16 -
+ .../rust/packed_simd/src/api/cmp/eq.rs | 27 -
+ .../rust/packed_simd/src/api/cmp/ord.rs | 43 -
+ .../packed_simd/src/api/cmp/partial_eq.rs | 65 -
+ .../packed_simd/src/api/cmp/partial_ord.rs | 230 ---
+ .../rust/packed_simd/src/api/cmp/vertical.rs | 114 --
+ .../rust/packed_simd/src/api/default.rs | 30 -
+ third_party/rust/packed_simd/src/api/fmt.rs | 12 -
+ .../rust/packed_simd/src/api/fmt/binary.rs | 54 -
+ .../rust/packed_simd/src/api/fmt/debug.rs | 60 -
+ .../rust/packed_simd/src/api/fmt/lower_hex.rs | 54 -
+ .../rust/packed_simd/src/api/fmt/octal.rs | 54 -
+ .../rust/packed_simd/src/api/fmt/upper_hex.rs | 54 -
+ third_party/rust/packed_simd/src/api/from.rs | 7 -
+ .../packed_simd/src/api/from/from_array.rs | 124 --
+ .../packed_simd/src/api/from/from_vector.rs | 67 -
+ third_party/rust/packed_simd/src/api/hash.rs | 49 -
+ .../rust/packed_simd/src/api/into_bits.rs | 59 -
+ .../src/api/into_bits/arch_specific.rs | 345 -----
+ .../packed_simd/src/api/into_bits/macros.rs | 74 -
+ .../packed_simd/src/api/into_bits/v128.rs | 232 ---
+ .../rust/packed_simd/src/api/into_bits/v16.rs | 9 -
+ .../packed_simd/src/api/into_bits/v256.rs | 232 ---
+ .../rust/packed_simd/src/api/into_bits/v32.rs | 13 -
+ .../packed_simd/src/api/into_bits/v512.rs | 232 ---
+ .../rust/packed_simd/src/api/into_bits/v64.rs | 18 -
+ third_party/rust/packed_simd/src/api/math.rs | 4 -
+ .../rust/packed_simd/src/api/math/float.rs | 64 -
+ .../packed_simd/src/api/math/float/abs.rs | 31 -
+ .../packed_simd/src/api/math/float/consts.rs | 74 -
+ .../packed_simd/src/api/math/float/cos.rs | 44 -
+ .../packed_simd/src/api/math/float/exp.rs | 33 -
+ .../rust/packed_simd/src/api/math/float/ln.rs | 33 -
+ .../packed_simd/src/api/math/float/mul_add.rs | 44 -
+ .../src/api/math/float/mul_adde.rs | 48 -
+ .../packed_simd/src/api/math/float/powf.rs | 36 -
+ .../packed_simd/src/api/math/float/recpre.rs | 36 -
+ .../packed_simd/src/api/math/float/rsqrte.rs | 40 -
+ .../packed_simd/src/api/math/float/sin.rs | 50 -
+ .../packed_simd/src/api/math/float/sqrt.rs | 35 -
+ .../packed_simd/src/api/math/float/sqrte.rs | 44 -
+ .../packed_simd/src/api/math/float/tanh.rs | 29 -
+ .../rust/packed_simd/src/api/minimal.rs | 6 -
+ .../rust/packed_simd/src/api/minimal/iuf.rs | 169 --
+ .../rust/packed_simd/src/api/minimal/mask.rs | 176 ---
+ .../rust/packed_simd/src/api/minimal/ptr.rs | 1373 -----------------
+ third_party/rust/packed_simd/src/api/ops.rs | 32 -
+ .../src/api/ops/scalar_arithmetic.rs | 203 ---
+ .../packed_simd/src/api/ops/scalar_bitwise.rs | 162 --
+ .../src/api/ops/scalar_mask_bitwise.rs | 140 --
+ .../packed_simd/src/api/ops/scalar_shifts.rs | 106 --
+ .../src/api/ops/vector_arithmetic.rs | 148 --
+ .../packed_simd/src/api/ops/vector_bitwise.rs | 129 --
+ .../src/api/ops/vector_float_min_max.rs | 74 -
+ .../src/api/ops/vector_int_min_max.rs | 57 -
+ .../src/api/ops/vector_mask_bitwise.rs | 116 --
+ .../packed_simd/src/api/ops/vector_neg.rs | 43 -
+ .../packed_simd/src/api/ops/vector_rotates.rs | 92 --
+ .../packed_simd/src/api/ops/vector_shifts.rs | 106 --
+ third_party/rust/packed_simd/src/api/ptr.rs | 4 -
+ .../packed_simd/src/api/ptr/gather_scatter.rs | 216 ---
+ .../rust/packed_simd/src/api/reductions.rs | 12 -
+ .../packed_simd/src/api/reductions/bitwise.rs | 151 --
+ .../src/api/reductions/float_arithmetic.rs | 313 ----
+ .../src/api/reductions/integer_arithmetic.rs | 193 ---
+ .../packed_simd/src/api/reductions/mask.rs | 89 --
+ .../packed_simd/src/api/reductions/min_max.rs | 360 -----
+ .../rust/packed_simd/src/api/select.rs | 73 -
+ .../rust/packed_simd/src/api/shuffle.rs | 184 ---
+ .../rust/packed_simd/src/api/shuffle1_dyn.rs | 159 --
+ third_party/rust/packed_simd/src/api/slice.rs | 7 -
+ .../packed_simd/src/api/slice/from_slice.rs | 202 ---
+ .../src/api/slice/write_to_slice.rs | 196 ---
+ .../rust/packed_simd/src/api/swap_bytes.rs | 192 ---
+ third_party/rust/packed_simd/src/codegen.rs | 62 -
+ .../rust/packed_simd/src/codegen/bit_manip.rs | 347 -----
+ .../rust/packed_simd/src/codegen/llvm.rs | 122 --
+ .../rust/packed_simd/src/codegen/math.rs | 3 -
+ .../packed_simd/src/codegen/math/float.rs | 19 -
+ .../packed_simd/src/codegen/math/float/abs.rs | 103 --
+ .../packed_simd/src/codegen/math/float/cos.rs | 103 --
+ .../src/codegen/math/float/cos_pi.rs | 87 --
+ .../packed_simd/src/codegen/math/float/exp.rs | 112 --
+ .../packed_simd/src/codegen/math/float/ln.rs | 112 --
+ .../src/codegen/math/float/macros.rs | 470 ------
+ .../src/codegen/math/float/mul_add.rs | 109 --
+ .../src/codegen/math/float/mul_adde.rs | 60 -
+ .../src/codegen/math/float/powf.rs | 112 --
+ .../packed_simd/src/codegen/math/float/sin.rs | 103 --
+ .../src/codegen/math/float/sin_cos_pi.rs | 188 ---
+ .../src/codegen/math/float/sin_pi.rs | 87 --
+ .../src/codegen/math/float/sqrt.rs | 103 --
+ .../src/codegen/math/float/sqrte.rs | 67 -
+ .../src/codegen/math/float/tanh.rs | 120 --
+ .../src/codegen/pointer_sized_int.rs | 28 -
+ .../packed_simd/src/codegen/reductions.rs | 1 -
+ .../src/codegen/reductions/mask.rs | 69 -
+ .../src/codegen/reductions/mask/aarch64.rs | 81 -
+ .../src/codegen/reductions/mask/arm.rs | 56 -
+ .../src/codegen/reductions/mask/fallback.rs | 8 -
+ .../codegen/reductions/mask/fallback_impl.rs | 237 ---
+ .../src/codegen/reductions/mask/x86.rs | 216 ---
+ .../src/codegen/reductions/mask/x86/avx.rs | 95 --
+ .../src/codegen/reductions/mask/x86/avx2.rs | 35 -
+ .../src/codegen/reductions/mask/x86/sse.rs | 35 -
+ .../src/codegen/reductions/mask/x86/sse2.rs | 68 -
+ .../rust/packed_simd/src/codegen/shuffle.rs | 150 --
+ .../packed_simd/src/codegen/shuffle1_dyn.rs | 408 -----
+ .../packed_simd/src/codegen/swap_bytes.rs | 149 --
+ .../rust/packed_simd/src/codegen/v128.rs | 46 -
+ .../rust/packed_simd/src/codegen/v16.rs | 7 -
+ .../rust/packed_simd/src/codegen/v256.rs | 78 -
+ .../rust/packed_simd/src/codegen/v32.rs | 11 -
+ .../rust/packed_simd/src/codegen/v512.rs | 145 --
+ .../rust/packed_simd/src/codegen/v64.rs | 21 -
+ .../rust/packed_simd/src/codegen/vPtr.rs | 35 -
+ .../rust/packed_simd/src/codegen/vSize.rs | 16 -
+ third_party/rust/packed_simd/src/lib.rs | 348 -----
+ third_party/rust/packed_simd/src/masks.rs | 126 --
+ third_party/rust/packed_simd/src/sealed.rs | 42 -
+ third_party/rust/packed_simd/src/testing.rs | 8 -
+ .../rust/packed_simd/src/testing/macros.rs | 44 -
+ .../rust/packed_simd/src/testing/utils.rs | 130 --
+ third_party/rust/packed_simd/src/v128.rs | 80 -
+ third_party/rust/packed_simd/src/v16.rs | 16 -
+ third_party/rust/packed_simd/src/v256.rs | 86 --
+ third_party/rust/packed_simd/src/v32.rs | 29 -
+ third_party/rust/packed_simd/src/v512.rs | 99 --
+ third_party/rust/packed_simd/src/v64.rs | 66 -
+ third_party/rust/packed_simd/src/vPtr.rs | 34 -
+ third_party/rust/packed_simd/src/vSize.rs | 53 -
+ .../rust/packed_simd/tests/endianness.rs | 268 ----
+ 235 files changed, 789 insertions(+), 18469 deletions(-)
+ create mode 100644 third_party/rust/any_all_workaround/.cargo-checksum.json
+ copy third_party/rust/{viaduct => any_all_workaround}/Cargo.toml (56%)
+ rename third_party/rust/{packed_simd => any_all_workaround}/LICENSE-APACHE
(100%)
+ rename third_party/rust/{packed_simd => any_all_workaround}/LICENSE-MIT
(100%)
+ copy gfx/qcms/COPYING =>
third_party/rust/any_all_workaround/LICENSE-MIT-QCMS (100%)
+ create mode 100644 third_party/rust/any_all_workaround/README.md
+ copy {gfx/qcms => third_party/rust/any_all_workaround}/build.rs (100%)
+ create mode 100644 third_party/rust/any_all_workaround/src/lib.rs
+ delete mode 100644 third_party/rust/packed_simd/.cargo-checksum.json
+ delete mode 100644 third_party/rust/packed_simd/Cargo.toml
+ delete mode 100644 third_party/rust/packed_simd/README.md
+ delete mode 100644 third_party/rust/packed_simd/bors.toml
+ delete mode 100644 third_party/rust/packed_simd/build.rs
+ delete mode 100755 third_party/rust/packed_simd/ci/all.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/android-install-ndk.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/android-install-sdk.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/android-sysimage.sh
+ delete mode 100755 third_party/rust/packed_simd/ci/benchmark.sh
+ delete mode 100644
third_party/rust/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/armv7-linux-androideabi/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/s390x-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/sparc64-unknown-linux-gnu/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/thumbv7neon-linux-androideabi/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/wasm32-unknown-unknown/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/x86_64-linux-android/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile
+ delete mode 100644
third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile
+ delete mode 100755 third_party/rust/packed_simd/ci/dox.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/linux-s390x.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/linux-sparc64.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/lld-shim.rs
+ delete mode 100755 third_party/rust/packed_simd/ci/max_line_width.sh
+ delete mode 100755 third_party/rust/packed_simd/ci/run-docker.sh
+ delete mode 100755 third_party/rust/packed_simd/ci/run.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/run_examples.sh
+ delete mode 100644 third_party/rust/packed_simd/ci/runtest-android.rs
+ delete mode 100755 third_party/rust/packed_simd/ci/setup_benchmarks.sh
+ delete mode 100755 third_party/rust/packed_simd/ci/test-runner-linux
+ delete mode 100644 third_party/rust/packed_simd/contributing.md
+ delete mode 100644 third_party/rust/packed_simd/perf-guide/book.toml
+ delete mode 100644 third_party/rust/packed_simd/perf-guide/src/SUMMARY.md
+ delete mode 100644 third_party/rust/packed_simd/perf-guide/src/ascii.css
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/bound_checks.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/float-math/approx.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/float-math/fma.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/float-math/fp.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/float-math/svml.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/introduction.md
+ delete mode 100644 third_party/rust/packed_simd/perf-guide/src/prof/linux.md
+ delete mode 100644 third_party/rust/packed_simd/perf-guide/src/prof/mca.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/prof/profiling.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/target-feature/attribute.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/target-feature/features.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/target-feature/inlining.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/target-feature/practice.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/target-feature/runtime.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/target-feature/rustflags.md
+ delete mode 100644
third_party/rust/packed_simd/perf-guide/src/vert-hor-ops.md
+ delete mode 100644 third_party/rust/packed_simd/rust-toolchain
+ delete mode 100644 third_party/rust/packed_simd/rustfmt.toml
+ delete mode 100644 third_party/rust/packed_simd/src/api.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/bit_manip.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/bitmask.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast/macros.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast/v128.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast/v16.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast/v256.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast/v32.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast/v512.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cast/v64.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cmp.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cmp/eq.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cmp/ord.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cmp/partial_eq.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cmp/partial_ord.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/cmp/vertical.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/default.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/fmt.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/fmt/binary.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/fmt/debug.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/fmt/lower_hex.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/fmt/octal.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/fmt/upper_hex.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/from.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/from/from_array.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/from/from_vector.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/hash.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/into_bits/arch_specific.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits/macros.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits/v128.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits/v16.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits/v256.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits/v32.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits/v512.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/into_bits/v64.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/abs.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/consts.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/cos.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/exp.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/ln.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/math/float/mul_add.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/math/float/mul_adde.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/powf.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/recpre.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/rsqrte.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/sin.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/sqrt.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/sqrte.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/math/float/tanh.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/minimal.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/minimal/iuf.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/minimal/mask.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/minimal/ptr.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/ops.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/scalar_arithmetic.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/scalar_bitwise.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/scalar_mask_bitwise.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/ops/scalar_shifts.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/vector_arithmetic.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/vector_bitwise.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/vector_float_min_max.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/vector_int_min_max.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/vector_mask_bitwise.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/ops/vector_neg.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ops/vector_rotates.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/ops/vector_shifts.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/ptr.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/ptr/gather_scatter.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/reductions.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/reductions/bitwise.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/reductions/float_arithmetic.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/reductions/integer_arithmetic.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/reductions/mask.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/reductions/min_max.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/select.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/shuffle.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/shuffle1_dyn.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/slice.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/slice/from_slice.rs
+ delete mode 100644
third_party/rust/packed_simd/src/api/slice/write_to_slice.rs
+ delete mode 100644 third_party/rust/packed_simd/src/api/swap_bytes.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/bit_manip.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/llvm.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/math.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/math/float.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/abs.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/cos.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/cos_pi.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/exp.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/math/float/ln.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/macros.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/mul_add.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/mul_adde.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/powf.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/sin.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/sin_cos_pi.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/sin_pi.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/sqrt.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/sqrte.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/math/float/tanh.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/pointer_sized_int.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/reductions.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/aarch64.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/arm.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/fallback.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/fallback_impl.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/x86.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/avx.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/avx2.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse.rs
+ delete mode 100644
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse2.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/shuffle.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/shuffle1_dyn.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/swap_bytes.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/v128.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/v16.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/v256.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/v32.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/v512.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/v64.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/vPtr.rs
+ delete mode 100644 third_party/rust/packed_simd/src/codegen/vSize.rs
+ delete mode 100644 third_party/rust/packed_simd/src/lib.rs
+ delete mode 100644 third_party/rust/packed_simd/src/masks.rs
+ delete mode 100644 third_party/rust/packed_simd/src/sealed.rs
+ delete mode 100644 third_party/rust/packed_simd/src/testing.rs
+ delete mode 100644 third_party/rust/packed_simd/src/testing/macros.rs
+ delete mode 100644 third_party/rust/packed_simd/src/testing/utils.rs
+ delete mode 100644 third_party/rust/packed_simd/src/v128.rs
+ delete mode 100644 third_party/rust/packed_simd/src/v16.rs
+ delete mode 100644 third_party/rust/packed_simd/src/v256.rs
+ delete mode 100644 third_party/rust/packed_simd/src/v32.rs
+ delete mode 100644 third_party/rust/packed_simd/src/v512.rs
+ delete mode 100644 third_party/rust/packed_simd/src/v64.rs
+ delete mode 100644 third_party/rust/packed_simd/src/vPtr.rs
+ delete mode 100644 third_party/rust/packed_simd/src/vSize.rs
+ delete mode 100644 third_party/rust/packed_simd/tests/endianness.rs
+
+diff --git a/.cargo/config.toml.in b/.cargo/config.toml.in
+index 637289358704..697280c2d014 100644
+--- a/.cargo/config.toml.in
++++ b/.cargo/config.toml.in
+@@ -35,6 +35,11 @@ git = "https://github.com/glandium/mio"
+ rev = "9a2ef335c366044ffe73b1c4acabe50a1daefe05"
+ replace-with = "vendored-sources"
+
++[source."git+https://github.com/hsivonen/any_all_workaround?rev=7fb1b7034c9f172aade21ee1c8554e8d8a48af80"]
++git = "https://github.com/hsivonen/any_all_workaround"
++rev = "7fb1b7034c9f172aade21ee1c8554e8d8a48af80"
++replace-with = "vendored-sources"
++
+
[source."git+https://github.com/hsivonen/chardetng?rev=3484d3e3ebdc8931493aa5df4d7ee9360a90e76b"]
+ git = "https://github.com/hsivonen/chardetng"
+ rev = "3484d3e3ebdc8931493aa5df4d7ee9360a90e76b"
+diff --git a/Cargo.lock b/Cargo.lock
+index 94e73e2fc6ac..b61ecc8f525a 100644
+--- a/Cargo.lock
++++ b/Cargo.lock
+@@ -91,6 +91,15 @@ version = "1.0.3"
+ source = "registry+https://github.com/rust-lang/crates.io-index"
+ checksum =
"b84bf0a05bbb2a83e5eb6fa36bb6e87baa08193c35ff52bbf6b38d8af2890e46"
+
++[[package]]
++name = "any_all_workaround"
++version = "0.1.0"
++source =
"git+https://github.com/hsivonen/any_all_workaround?rev=7fb1b7034c9f172aade21ee1c8554e8d8a48af80#7fb1b7034c9f172aade21ee1c8554e8d8a48af80"
++dependencies = [
++ "cfg-if 1.0.0",
++ "version_check",
++]
++
+ [[package]]
+ name = "anyhow"
+ version = "1.0.69"
+@@ -1575,12 +1584,12 @@ dependencies = [
+
+ [[package]]
+ name = "encoding_rs"
+-version = "0.8.33"
++version = "0.8.34"
+ source = "registry+https://github.com/rust-lang/crates.io-index"
+-checksum =
"7268b386296a025e474d5140678f75d6de9493ae55a5d709eeb9dd08149945e1"
++checksum =
"b45de904aa0b010bce2ab45264d0631681847fa7b6f2eaa7dab7619943bc4f59"
+ dependencies = [
++ "any_all_workaround",
+ "cfg-if 1.0.0",
+- "packed_simd",
+ ]
+
+ [[package]]
+@@ -4332,16 +4341,6 @@ dependencies = [
+ "oxilangtag",
+ ]
+
+-[[package]]
+-name = "packed_simd"
+-version = "0.3.9"
+-source = "registry+https://github.com/rust-lang/crates.io-index"
+-checksum =
"1f9f08af0c877571712e2e3e686ad79efad9657dbf0f7c3c8ba943ff6c38932d"
+-dependencies = [
+- "cfg-if 1.0.0",
+- "num-traits",
+-]
+-
+ [[package]]
+ name = "parking_lot"
+ version = "0.12.1"
+diff --git a/Cargo.toml b/Cargo.toml
+index e3936430f963..1f5aeb3c6a9e 100644
+--- a/Cargo.toml
++++ b/Cargo.toml
+@@ -200,6 +200,7 @@ cssparser-macros = { git =
"https://github.com/servo/rust-cssparser", rev = "aaa
+ unicode-bidi = { git = "https://github.com/servo/unicode-bidi", rev =
"ca612daf1c08c53abe07327cb3e6ef6e0a760f0c" }
+
+ # Other overrides
++any_all_workaround = { git =
"https://github.com/hsivonen/any_all_workaround", rev =
"7fb1b7034c9f172aade21ee1c8554e8d8a48af80" }
+ chardetng = { git = "https://github.com/hsivonen/chardetng", rev =
"3484d3e3ebdc8931493aa5df4d7ee9360a90e76b" }
+ chardetng_c = { git = "https://github.com/hsivonen/chardetng_c", rev =
"ed8a4c6f900a90d4dbc1d64b856e61490a1c3570" }
+ coremidi = { git = "https://github.com/chris-zen/coremidi.git", rev =
"fc68464b5445caf111e41f643a2e69ccce0b4f83" }
+diff --git a/config/makefiles/rust.mk b/config/makefiles/rust.mk
+index 52c4e402f9d1..4b36aa99bc29 100644
+--- a/config/makefiles/rust.mk
++++ b/config/makefiles/rust.mk
+@@ -265,7 +265,7 @@ endif
+ ifndef RUSTC_BOOTSTRAP
+ RUSTC_BOOTSTRAP := mozglue_static,qcms
+ ifdef MOZ_RUST_SIMD
+-RUSTC_BOOTSTRAP := $(RUSTC_BOOTSTRAP),encoding_rs,packed_simd
++RUSTC_BOOTSTRAP := $(RUSTC_BOOTSTRAP),encoding_rs,any_all_workaround
+ endif
+ export RUSTC_BOOTSTRAP
+ endif
+diff --git a/supply-chain/audits.toml b/supply-chain/audits.toml
+index b21bde4f1024..163f1f5c98e8 100644
+--- a/supply-chain/audits.toml
++++ b/supply-chain/audits.toml
+@@ -588,6 +588,19 @@ who = "Mike Hommey <mh+mozilla AT glandium.org>"
+ criteria = "safe-to-deploy"
+ delta = "0.1.4 -> 0.1.5"
+
++[[audits.any_all_workaround]]
++who = "Henri Sivonen <hsivonen AT hsivonen.fi>"
++criteria = "safe-to-deploy"
++version = "0.1.0"
++notes = "The little code that is in this crate I reviewed and modified from
packed_simd (which has previously been vendored in full instead of just this
small part)."
++
++[[audits.any_all_workaround]]
++who = "Henri Sivonen <hsivonen AT hsivonen.fi>"
++criteria = "safe-to-deploy"
++delta = "0.1.0 -> 0.1.0@git:7fb1b7034c9f172aade21ee1c8554e8d8a48af80"
++importable = false
++notes = "This is a trivial workaround copied from elsewhere in m-c,
specifically qcms."
++
+ [[audits.anyhow]]
+ who = "Mike Hommey <mh+mozilla AT glandium.org>"
+ criteria = "safe-to-deploy"
+diff --git a/supply-chain/config.toml b/supply-chain/config.toml
+index 20b62a8210e1..be8809bff543 100644
+--- a/supply-chain/config.toml
++++ b/supply-chain/config.toml
+@@ -19,6 +19,10 @@ url =
"https://raw.githubusercontent.com/divviup/libprio-rs/main/supply-chain/au
+ [imports.mozilla]
+ url =
"https://raw.githubusercontent.com/mozilla/supply-chain/main/audits.toml"
+
++[policy.any_all_workaround]
++audit-as-crates-io = true
++notes = "This is the upstream code plus the ARM intrinsics workaround from
qcms, see bug 1882209."
++
+ [policy.autocfg]
+ audit-as-crates-io = true
+ notes = "This is the upstream code plus a few local fixes, see bug 1685697."
+diff --git a/supply-chain/imports.lock b/supply-chain/imports.lock
+index 73065c6c4fc2..73f667de2368 100644
+--- a/supply-chain/imports.lock
++++ b/supply-chain/imports.lock
+@@ -183,6 +183,13 @@ user-id = 4484
+ user-login = "hsivonen"
+ user-name = "Henri Sivonen"
+
++[[publisher.encoding_rs]]
++version = "0.8.34"
++when = "2024-04-10"
++user-id = 4484
++user-login = "hsivonen"
++user-name = "Henri Sivonen"
++
+ [[publisher.errno]]
+ version = "0.3.8"
+ when = "2023-11-28"
+diff --git a/third_party/rust/any_all_workaround/.cargo-checksum.json
b/third_party/rust/any_all_workaround/.cargo-checksum.json
+new file mode 100644
+index 000000000000..8d16e68a7eeb
+--- /dev/null
++++ b/third_party/rust/any_all_workaround/.cargo-checksum.json
+@@ -0,0 +1 @@
++{"files":{"Cargo.toml":"f8c127449dc9432d404c21c99833e4617ab88a797445af249a7fe3c989985d6d","LICENSE-APACHE":"a60eea817514531668d7e00765731449fe14d059d3249e0bc93b36de45f759f2","LICENSE-MIT":"6485b8ed310d3f0340bf1ad1f47645069ce4069dcc6bb46c7d5c6faf41de1fdb","LICENSE-MIT-QCMS":"36d847ae882f6574ebc72f56a4f354e4f104fde4a584373496482e97d52d31bc","README.md":"4c617b8ced3a27b7edecf0e5e41ed451c04e88dab529e7a35fccc4e1551efbd7","build.rs":"56b29ab6da3e49075bfd0a7b690267c8016298bf0d332e2e68bbaf19decbbf71","src/lib.rs":"7118106690b9d25c5d0a3e2079feb83d76f1d434d0da36b9d0351806d27c850d"},"package":null}
+\ No newline at end of file
+diff --git a/third_party/rust/viaduct/Cargo.toml
b/third_party/rust/any_all_workaround/Cargo.toml
+similarity index 56%
+copy from third_party/rust/viaduct/Cargo.toml
+copy to third_party/rust/any_all_workaround/Cargo.toml
+index 74a1db66b8b9..4b03a3578146 100644
+--- a/third_party/rust/viaduct/Cargo.toml
++++ b/third_party/rust/any_all_workaround/Cargo.toml
+@@ -11,28 +11,18 @@
+
+ [package]
+ edition = "2021"
+-name = "viaduct"
++name = "any_all_workaround"
+ version = "0.1.0"
+-authors = ["Thom Chiovoloni <tchiovoloni AT mozilla.com>"]
+-exclude = [
+- "/android",
+- "/ios",
+-]
++authors = ["Henri Sivonen <hsivonen AT hsivonen.fi>"]
++description = "Workaround for bad LLVM codegen for boolean reductions on
32-bit ARM"
++homepage = "https://docs.rs/any_all_workaround/"
++documentation = "https://docs.rs/any_all_workaround/"
+ readme = "README.md"
+-license = "MPL-2.0"
+-
+-[lib]
+-crate-type = ["lib"]
++license = "MIT OR Apache-2.0"
++repository = "https://github.com/hsivonen/any_all_workaround"
+
+ [dependencies]
+-ffi-support = "0.4"
+-log = "0.4"
+-once_cell = "1.5"
+-prost = "0.12"
+-serde = "1"
+-serde_json = "1"
+-thiserror = "1.0"
+-url = "2.1"
++cfg-if = "1.0"
+
+-[dependencies.parking_lot]
+-version = ">=0.11,<=0.12"
++[build-dependencies]
++version_check = "0.9"
+diff --git a/third_party/rust/packed_simd/LICENSE-APACHE
b/third_party/rust/any_all_workaround/LICENSE-APACHE
+similarity index 100%
+rename from third_party/rust/packed_simd/LICENSE-APACHE
+rename to third_party/rust/any_all_workaround/LICENSE-APACHE
+diff --git a/third_party/rust/packed_simd/LICENSE-MIT
b/third_party/rust/any_all_workaround/LICENSE-MIT
+similarity index 100%
+rename from third_party/rust/packed_simd/LICENSE-MIT
+rename to third_party/rust/any_all_workaround/LICENSE-MIT
+diff --git a/gfx/qcms/COPYING
b/third_party/rust/any_all_workaround/LICENSE-MIT-QCMS
+similarity index 100%
+copy from gfx/qcms/COPYING
+copy to third_party/rust/any_all_workaround/LICENSE-MIT-QCMS
+diff --git a/third_party/rust/any_all_workaround/README.md
b/third_party/rust/any_all_workaround/README.md
+new file mode 100644
+index 000000000000..9f83ac369513
+--- /dev/null
++++ b/third_party/rust/any_all_workaround/README.md
+@@ -0,0 +1,13 @@
++# any_all_workaround
++
++This is a workaround for bad codegen ([Rust
bug](https://github.com/rust-lang/portable-simd/issues/146), [LLVM
bug](https://github.com/llvm/llvm-project/issues/50466)) for the `any()` and
`all()` reductions for NEON-backed SIMD vectors on 32-bit ARM. On other
platforms these delegate to `any()` and `all()` in `core::simd`.
++
++The plan is to abandon this crate once the LLVM bug is fixed or
`core::simd` works around the LLVM bug.
++
++The code is forked from the [`packed_simd`
crate](https://raw.githubusercontent.com/hsivonen/packed_simd/d938e39bee9bc5c222f5f2f2a0df9e53b5ce36ae/src/codegen/reductions/mask/arm.rs).
++
++This crate requires Nightly Rust as it depends on the `portable_simd`
feature.
++
++# License
++
++`MIT OR Apache-2.0`, since that's how `packed_simd` is licensed. (The ARM
intrinsics Rust version workaround is from qcms, see LICENSE-MIT-QCMS.)
+diff --git a/gfx/qcms/build.rs b/third_party/rust/any_all_workaround/build.rs
+similarity index 100%
+copy from gfx/qcms/build.rs
+copy to third_party/rust/any_all_workaround/build.rs
+diff --git a/third_party/rust/any_all_workaround/src/lib.rs
b/third_party/rust/any_all_workaround/src/lib.rs
+new file mode 100644
+index 000000000000..f0b8b13609cb
+--- /dev/null
++++ b/third_party/rust/any_all_workaround/src/lib.rs
+@@ -0,0 +1,110 @@
++// This code began as a fork of
++// https://raw.githubusercontent.com/rust-lang/packed_simd/d938e39bee9bc5c222f5f2f2a0df9e53b5ce36ae/src/codegen/reductions/mask/arm.rs
++// which didn't have a license header on the file, but Cargo.toml said "MIT
OR Apache-2.0".
++// See LICENSE-MIT and LICENSE-APACHE.
++
++#![no_std]
++#![feature(portable_simd)]
++#![cfg_attr(
++ all(
++ stdsimd_split,
++ target_arch = "arm",
++ target_endian = "little",
++ target_feature = "neon",
++ target_feature = "v7"
++ ),
++ feature(stdarch_arm_neon_intrinsics)
++)]
++#![cfg_attr(
++ all(
++ not(stdsimd_split),
++ target_arch = "arm",
++ target_endian = "little",
++ target_feature = "neon",
++ target_feature = "v7"
++ ),
++ feature(stdsimd)
++)]
++
++use cfg_if::cfg_if;
++use core::simd::mask16x8;
++use core::simd::mask32x4;
++use core::simd::mask8x16;
++
++cfg_if! {
++ if #[cfg(all(target_arch = "arm", target_endian = "little",
target_feature = "neon", target_feature = "v7"))] {
++ use core::simd::mask8x8;
++ use core::simd::mask16x4;
++ use core::simd::mask32x2;
++ macro_rules! arm_128_v7_neon_impl {
++ ($all:ident, $any:ident, $id:ident, $half:ident, $vpmin:ident,
$vpmax:ident) => {
++ #[inline]
++ pub fn $all(s: $id) -> bool {
++ use core::arch::arm::$vpmin;
++ use core::mem::transmute;
++ unsafe {
++ union U {
++ halves: ($half, $half),
++ vec: $id,
++ }
++ let halves = U { vec: s }.halves;
++ let h: $half =
transmute($vpmin(transmute(halves.0), transmute(halves.1)));
++ h.all()
++ }
++ }
++ #[inline]
++ pub fn $any(s: $id) -> bool {
++ use core::arch::arm::$vpmax;
++ use core::mem::transmute;
++ unsafe {
++ union U {
++ halves: ($half, $half),
++ vec: $id,
++ }
++ let halves = U { vec: s }.halves;
++ let h: $half =
transmute($vpmax(transmute(halves.0), transmute(halves.1)));
++ h.any()
++ }
++ }
++ }
++ }
++ } else {
++ macro_rules! arm_128_v7_neon_impl {
++ ($all:ident, $any:ident, $id:ident, $half:ident, $vpmin:ident,
$vpmax:ident) => {
++ #[inline(always)]
++ pub fn $all(s: $id) -> bool {
++ s.all()
++ }
++ #[inline(always)]
++ pub fn $any(s: $id) -> bool {
++ s.any()
++ }
++ }
++ }
++ }
++}
++
++arm_128_v7_neon_impl!(
++ all_mask8x16,
++ any_mask8x16,
++ mask8x16,
++ mask8x8,
++ vpmin_u8,
++ vpmax_u8
++);
++arm_128_v7_neon_impl!(
++ all_mask16x8,
++ any_mask16x8,
++ mask16x8,
++ mask16x4,
++ vpmin_u16,
++ vpmax_u16
++);
++arm_128_v7_neon_impl!(
++ all_mask32x4,
++ any_mask32x4,
++ mask32x4,
++ mask32x2,
++ vpmin_u32,
++ vpmax_u32
++);
+diff --git a/third_party/rust/encoding_rs/.cargo-checksum.json
b/third_party/rust/encoding_rs/.cargo-checksum.json
+index a5e1f1ba2513..d5e91dd7e2ac 100644
+--- a/third_party/rust/encoding_rs/.cargo-checksum.json
++++ b/third_party/rust/encoding_rs/.cargo-checksum.json
+@@ -1 +1 @@
+-{"files":{"CONTRIBUTING.md":"ca1901f3e8532fb4cec894fd3664f0eaa898c0c4b961d1b992d1ed54eacf362a","COPYRIGHT":"11789f45bb180841cd362a5eee6789c68ddb573a11105e30768c308a6add0190","Cargo.toml":"42fa83322aa9fd6723b77d35d0cacb92cbb6e7f573ce11c55f5225292866f8f4","Ideas.md":"b7452893f500163868d8de52c09addaf91e1632454ed02e892c467ed7ec39dbd","LICENSE-APACHE":"cfc7749b96f63bd31c3c42b5c471bf756814053e847c10f3eb003417bc523d30","LICENSE-MIT":"3fa4ca83dcc9237839b1bdeb2e6d16bdfb5ec0c5ce42b24694d8bbf0dcbef72c","LICENSE-WHATWG":"838118388fe5c2e7f1dbbaeed13e1c7f3ebf88be91319c7c1d77c18e987d1a50","README.md":"d938e8ab0b9ab67e74a1a4f48f23fdce956d0ad3a3f6147ae7612a92763c88d5","ci/miri.sh":"43cb8d82f49e3bfe2d2274b6ccd6f0714a4188ccef0cecc040829883cfdbee25","doc/Big5.txt":"f73a2edc5cb6c2d140ba6e07f4542e1c4a234950378acde1df93480f0ca0be0b","doc/EUC-JP.txt":"ee2818b907d0137f40a9ab9fd525fc700a44dbdddb6cf0c157a656566bae4bf1","doc/EUC-KR.txt":"71d9e2ccf3b124e8bdfb433c8cf2773fd878077038d0cec3c7237a50f4a78a30","doc/GBK.txt":"c1b522b5a799884e5001da661f42c5a8f4d0acb9ef1d74b206f22b5f65365606","doc/IBM866.txt":"a5a433e804d0f83af785015179fbc1d9b0eaf1f7960efcd04093e136b51fbd0e","doc/ISO-2022-JP.txt":"af86684f5a8f0e2868d7b2c292860140c3d2e5527530ca091f1b28198e8e2fe6","doc/ISO-8859-10.txt":"6d3949ad7c81ca176895101ed81a1db7df1060d64e262880b94bd31bb344ab4d","doc/ISO-8859-13.txt":"3951dd89cf93f7729148091683cf8511f4529388b7dc8dcd0d62eaed55be93fa","doc/ISO-8859-14.txt":"3d330784a0374fd255a38b47949675cc7168c800530534b0a01cac6edc623adc","doc/ISO-8859-15.txt":"24b1084aab5127a85aab99153f86e24694d0a3615f53b5ce23683f97cf66c47a","doc/ISO-8859-16.txt":"ce0272559b92ba76d7a7e476f6424ae4a5cc72e75b183611b08392e44add4d25","doc/ISO-8859-2.txt":"18ceff88c13d1b5ba455a3919b1e3de489045c4c3d2dd7e8527c125c75d54aad","doc/ISO-8859-3.txt":"21798404c68f4f5db59223362f24999da96968c0628427321fccce7d2849a130","doc/ISO-8859-4.txt":"d27f6520c6c5bfbcc19176b71d081cdb3bccde1622bb3e420d5680e812632d53","doc/ISO-8859-5.txt":"a10ec8d6ea7a78ad15da7275f6cb1a3365118527e28f9af6d0d5830501303f3a","doc/ISO-8859-6.txt":"ccda8a2efc96115336bdd77776637b9712425e44fbcf745353b9057fbef144e7","doc/ISO-8859-7.txt":"17900fa1f27a445958f0a77d7d9056be375a6bd7ee4492aa680c7c1500bab85e","doc/ISO-8859-8-I.txt":"8357555646d54265a9b9ffa3e68b08d132312f1561c60108ff9b8b1167b6ecf2","doc/ISO-8859-8.txt":"72cd6f3afb7b4a9c16a66a362473315770b7755d72c86c870e52fc3eba86c8af","doc/KOI8-R.txt":"839cf19a38da994488004ed7814b1f6151640156a9a2af02bf2efca745fb5966","doc/KOI8-U.txt":"0cc76624ed1f024183e2298b7e019957da2c70c8ca06e0fc4e6f353f50a5054f","doc/Shift_JIS.txt":"34c49141818cb9ddbcf59cc858f78a79be8ad148d563f26415108ae1f148443f","doc/UTF-16BE.txt":"e2e280d8acbaa6d2a6b3569d60e17500a285f2baa0df3363dd85537cd5a1ef8f","doc/UTF-16LE.txt":"70bdc170e3fc5298ba68f10125fb5eeb8b077036cc96bb4416c4de396f6d76c1","doc/UTF-8.txt":"ea7bae742e613010ced002cf4b601a737d2203fad65e115611451bc4428f548a","doc/gb18030.txt":"dc71378a8f07a2d8659f69ee81fb8791fef56ba86f124b429978285237bb4a7b","doc/macintosh.txt":"57491e53866711b4672d9b9ff35380b9dac9e0d8e3d6c20bdd6140603687c023","doc/replacement.txt":"4b6c3bbd7999d9d4108a281594bd02d13607e334a95465afff8c2c08d395f0e4","doc/windows-1250.txt":"61296bb6a21cdab602300d32ecfba434cb82de5ac3bc88d58710d2f125e28d39","doc/windows-1251.txt":"7deea1c61dea1485c8ff02db2c7d578db7a9aab63ab1cfd02ec04b515864689e","doc/windows-1252.txt":"933ef3bdddfce5ee132b9f1a1aa8b47423d2587bbe475b19028d0a6d38e180b6","doc/windows-1253.txt":"1a38748b88e99071a5c7b3d5456ead4caedeabab50d50d658be105bc113714de","doc/windows-1254.txt":"f8372f86c6f8d642563cd6ddc025260553292a39423df1683a98670bd7bf2b47","doc/windows-1255.txt":"4e5852494730054e2da258a74e1b9d780abbcdd8ce22ebc218ca2efe9e90493d","doc/windows-1256.txt":"c0879c5172abedead302a406e8f60d9cd9598694a0ffa4fd288ffe4fef7b8ea1","doc/windows-1257.txt":"c28a0c9f964fcb2b46d21f537c402446501a2800670481d6abf9fd9e9018d523","doc/windows-1258.txt":"5019ae4d61805c79aacbf17c93793342dbb098d65a1837783bc3e2c6d6a23602","doc/windows-874.txt":"4ef0e4501c5feba8b17aee1818602ed44b36ca8475db771ce2fc16d392cabecc","doc/x-mac-cyrillic.txt":"58be154d8a888ca3d484b83b44f749823ef339ab27f14d90ca9a856f5050a8bd","doc/x-user-defined.txt":"f9cd07c4321bf5cfb0be4bdddd251072999b04a6cf7a6f5bc63709a84e2c1ffc","generate-encoding-data.py":"be989dd25c6b946e3e8745fdc8e8a80fcf24b3be99ad0b4b78153ba3f6ab6310","rustfmt.toml":"85c1a3b4382fd89e991cbb81b70fb52780472edc064c963943cdaaa56e0a2030","src/ascii.rs":"c44c002641adb5ebc4368707a8cc0a076d2f33e6a5c27b1b69988eb515f5653d","src/big5.rs":"ec6e2913011a38e9a3e825a1731f139a7ca1d5b264fefae51a3cc1a68a57cef9","src/data.rs":"8a617cc57032092d65850eb27e00de687c80aea3299e839a1f58b42d0b35abf3","src/euc_jp.rs":"32047f5b540188c4cb19c07165f846b9786a09f18e315ed3e9bda1293dae52aa","src/euc_kr.rs":"9b25afc72d9378700eecfac58d55ad1c5946d6cd0ccde2c29c08200ef2de6bb9","src/gb18030.rs":"808587168d73f0c80f8520f0ca9b161866ed2efeb17a05e85fdf3b8efe7ba28a","src/handles.rs":"cc83dc0754751d67f5688a65c5e0191cba02f6bacce81a0813a243cba55eef7a","src/iso_2022_jp.rs":"9bb485e82574f4b7d4b2364f0ff276acb6a0bc111758420a3b0ec5e04c196652","src/lib.rs":"1dc07b818e45846b16ddcaf0de46c8862dd7df8099123ec38b95c3f8ad9c91ec","src/macros.rs":"200997f8870de8bfd8cdc475e92115df42108c0df661e49d3d1cbc32056e1d99","src/mem.rs":"0bf34103e0ad1b842a13a082dee2b920b05cf4fb0f145c9ee7f608f4cb4a544f","src/replacement.rs":"7660b34a53f8c1ca2bdfa0e51e843ec28326950952ad8bc96569feb93ac62308","src/shift_jis.rs":"6951ae67e36b1a12fa3a30734957f444d8b1b4ae0e2bde52060b29bd0f16d9d9","src/simd_funcs.rs":"2612aba86e1d201096d7e47a859bc3444f85934cc82d8adc6d39a4304d9eecfc","src/single_byte.rs":"3c9e9c1f946ae622c725ba9421240c1faa9a05e95fa10dd4642a25cb276a1edc","src/test_data/big5_in.txt":"4c5a8691f8dc717311889c63894026d2fb62725a86c4208ca274a9cc8d42a503","src/test_data/big5_in_ref.txt":"99d399e17750cf9c7cf30bb253dbfe35b81c4fcbdead93cfa48b1429213473c7","src/test_data/big5_out.txt":"6193ca97c297aa20e09396038d18e938bb7ea331c26f0f2454097296723a0b13","src/test_data/big5_out_ref.txt":"36567691f557df144f6cc520015a87038dfa156f296fcf103b56ae9a718be1fc","src/test_data/euc_kr_in.txt":"c86a7224f3215fa0d04e685622a752fdc72763e8ae076230c7fd62de57ec4074","src/test_data/euc_kr_in_ref.txt":"1f419f4ca47d708b54c73c461545a022ae2e20498fdbf8005a483d752a204883","src/test_data/euc_kr_out.txt":"e7f32e026f70be1e1b58e0047baf7d3d2c520269c4f9b9992e158b4decb0a1a3","src/test_data/euc_kr_out_ref.txt":"c9907857980b20b8e9e3b584482ed6567a2be6185d72237b6322f0404944924e","src/test_data/gb18030_in.txt":"ab7231b2d3e9afacdbd7d7f3b9e5361a7ff9f7e1cfdb4f3bd905b9362b309e53","src/test_data/gb18030_in_ref.txt":"dc5069421adca2043c55f5012b55a76fdff651d22e6e699fd0978f8d5706815c","src/test_data/gb18030_out.txt":"f0208d527f5ca63de7d9a0323be8d5cf12d8a104b2943d92c2701f0c3364dac1","src/test_data/gb18030_out_ref.txt":"6819fe47627e4ea01027003fc514b9f21a1322e732d7f1fb92cc6c5455bc6c07","src/test_data/iso_2022_jp_in.txt":"cd24bbdcb1834e25db54646fbf4c41560a13dc7540f6be3dba4f5d97d44513af","src/test_data/iso_2022_jp_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/iso_2022_jp_out.txt":"9b6f015329dda6c3f9ee5ce6dbd6fa9c89acc21283e886836c78b8d833480c21","src/test_data/iso_2022_jp_out_ref.txt":"78cb260093a20116ad9a42f43b05d1848c5ab100b6b9a850749809e943884b35","src/test_data/jis0208_in.txt":"6df3030553ffb0a6615bb33dc8ea9dca6d9623a9028e2ffec754ce3c3da824cc","src/test_data/jis0208_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/jis0208_out.txt":"4ec24477e1675ce750733bdc3c5add1cd27b6bd4ce1f09289564646e9654e857","src/test_data/jis0208_out_ref.txt":"c3e1cef5032b2b1d93a406f31ff940c4e2dfe8859b8b17ca2761fee7a75a0e48","src/test_data/jis0212_in.txt":"c011f0dd72bd7c8cd922df9374ef8d2769a77190514c77f6c62b415852eeb9fe","src/test_data/jis0212_in_ref.txt":"7d9458b3d2f73e7092a7f505c08ce1d233dde18aa679fbcf9889256239cc9e06","src/test_data/shift_jis_in.txt":"02e389ccef0dd2122e63f503899402cb7f797912c2444cc80ab93131116c5524","src/test_data/shift_jis_in_ref.txt":"512f985950ca902e643c88682dba9708b7c38d3c5ec2925168ab00ac94ab19f9","src/test_data/shift_jis_out.txt":"5fbc44da7bf639bf6cfe0fa1fd3eba7102b88f81919c9ea991302712f69426fb","src/test_data/shift_jis_out_ref.txt":"466322c6fed8286c64582731755290c2296508efdd258826e6279686649b481f","src/test_labels_names.rs":"23a2e11b02b3b8d15fb5613a625e3edb2c61e70e3c581abfd638719a4088200d","src/testing.rs":"f59e671e95a98a56f6b573e8c6be4d71e670bf52f7e20eb1605d990aafa1894e","src/utf_16.rs":"c071a147fad38d750c2c247e141b76b929a48007b99f26b2922b9caecdaf2f25","src/utf_8.rs":"7b7d887b347f1aefa03246b028a36a72758a4ce76c28f3b45c19467851aa7839","src/variant.rs":"1fab5363588a1554a7169de8731ea9cded7ac63ea35caabdd1c27a8dde68c27b","src/x_user_defined.rs":"c9c010730dfb9f141d4fed19350c08a21af240913a54bb64f5ca89ff93b6b7d1"},"package":"7268b386296a025e474d5140678f75d6de9493ae55a5d709eeb9dd08149945e1"}
+\ No newline at end of file
++{"files":{"CONTRIBUTING.md":"ca1901f3e8532fb4cec894fd3664f0eaa898c0c4b961d1b992d1ed54eacf362a","COPYRIGHT":"11789f45bb180841cd362a5eee6789c68ddb573a11105e30768c308a6add0190","Cargo.toml":"22a4d210c92dae9f32c6944ef340ee8fdd027f99c081577e8907123e2a93383e","Ideas.md":"b7452893f500163868d8de52c09addaf91e1632454ed02e892c467ed7ec39dbd","LICENSE-APACHE":"cfc7749b96f63bd31c3c42b5c471bf756814053e847c10f3eb003417bc523d30","LICENSE-MIT":"3fa4ca83dcc9237839b1bdeb2e6d16bdfb5ec0c5ce42b24694d8bbf0dcbef72c","LICENSE-WHATWG":"838118388fe5c2e7f1dbbaeed13e1c7f3ebf88be91319c7c1d77c18e987d1a50","README.md":"1d08aefcb92afa81b18154049c9abbcad4540a23f7172e9f9bbed5af33f1a087","ci/miri.sh":"43cb8d82f49e3bfe2d2274b6ccd6f0714a4188ccef0cecc040829883cfdbee25","doc/Big5.txt":"f73a2edc5cb6c2d140ba6e07f4542e1c4a234950378acde1df93480f0ca0be0b","doc/EUC-JP.txt":"ee2818b907d0137f40a9ab9fd525fc700a44dbdddb6cf0c157a656566bae4bf1","doc/EUC-KR.txt":"71d9e2ccf3b124e8bdfb433c8cf2773fd878077038d0cec3c7237a50f4a78a30","doc/GBK.txt":"c1b522b5a799884e5001da661f42c5a8f4d0acb9ef1d74b206f22b5f65365606","doc/IBM866.txt":"a5a433e804d0f83af785015179fbc1d9b0eaf1f7960efcd04093e136b51fbd0e","doc/ISO-2022-JP.txt":"af86684f5a8f0e2868d7b2c292860140c3d2e5527530ca091f1b28198e8e2fe6","doc/ISO-8859-10.txt":"6d3949ad7c81ca176895101ed81a1db7df1060d64e262880b94bd31bb344ab4d","doc/ISO-8859-13.txt":"3951dd89cf93f7729148091683cf8511f4529388b7dc8dcd0d62eaed55be93fa","doc/ISO-8859-14.txt":"3d330784a0374fd255a38b47949675cc7168c800530534b0a01cac6edc623adc","doc/ISO-8859-15.txt":"24b1084aab5127a85aab99153f86e24694d0a3615f53b5ce23683f97cf66c47a","doc/ISO-8859-16.txt":"ce0272559b92ba76d7a7e476f6424ae4a5cc72e75b183611b08392e44add4d25","doc/ISO-8859-2.txt":"18ceff88c13d1b5ba455a3919b1e3de489045c4c3d2dd7e8527c125c75d54aad","doc/ISO-8859-3.txt":"21798404c68f4f5db59223362f24999da96968c0628427321fccce7d2849a130","doc/ISO-8859-4.txt":"d27f6520c6c5bfbcc19176b71d081cdb3bccde1622bb3e420d5680e812632d53","doc/ISO-8859-5.txt":"a10ec8d6ea7a78ad15da7275f6cb1a3365118527e28f9af6d0d5830501303f3a","doc/ISO-8859-6.txt":"ccda8a2efc96115336bdd77776637b9712425e44fbcf745353b9057fbef144e7","doc/ISO-8859-7.txt":"17900fa1f27a445958f0a77d7d9056be375a6bd7ee4492aa680c7c1500bab85e","doc/ISO-8859-8-I.txt":"8357555646d54265a9b9ffa3e68b08d132312f1561c60108ff9b8b1167b6ecf2","doc/ISO-8859-8.txt":"72cd6f3afb7b4a9c16a66a362473315770b7755d72c86c870e52fc3eba86c8af","doc/KOI8-R.txt":"839cf19a38da994488004ed7814b1f6151640156a9a2af02bf2efca745fb5966","doc/KOI8-U.txt":"0cc76624ed1f024183e2298b7e019957da2c70c8ca06e0fc4e6f353f50a5054f","doc/Shift_JIS.txt":"34c49141818cb9ddbcf59cc858f78a79be8ad148d563f26415108ae1f148443f","doc/UTF-16BE.txt":"e2e280d8acbaa6d2a6b3569d60e17500a285f2baa0df3363dd85537cd5a1ef8f","doc/UTF-16LE.txt":"70bdc170e3fc5298ba68f10125fb5eeb8b077036cc96bb4416c4de396f6d76c1","doc/UTF-8.txt":"ea7bae742e613010ced002cf4b601a737d2203fad65e115611451bc4428f548a","doc/gb18030.txt":"dc71378a8f07a2d8659f69ee81fb8791fef56ba86f124b429978285237bb4a7b","doc/macintosh.txt":"57491e53866711b4672d9b9ff35380b9dac9e0d8e3d6c20bdd6140603687c023","doc/replacement.txt":"4b6c3bbd7999d9d4108a281594bd02d13607e334a95465afff8c2c08d395f0e4","doc/windows-1250.txt":"61296bb6a21cdab602300d32ecfba434cb82de5ac3bc88d58710d2f125e28d39","doc/windows-1251.txt":"7deea1c61dea1485c8ff02db2c7d578db7a9aab63ab1cfd02ec04b515864689e","doc/windows-1252.txt":"933ef3bdddfce5ee132b9f1a1aa8b47423d2587bbe475b19028d0a6d38e180b6","doc/windows-1253.txt":"1a38748b88e99071a5c7b3d5456ead4caedeabab50d50d658be105bc113714de","doc/windows-1254.txt":"f8372f86c6f8d642563cd6ddc025260553292a39423df1683a98670bd7bf2b47","doc/windows-1255.txt":"4e5852494730054e2da258a74e1b9d780abbcdd8ce22ebc218ca2efe9e90493d","doc/windows-1256.txt":"c0879c5172abedead302a406e8f60d9cd9598694a0ffa4fd288ffe4fef7b8ea1","doc/windows-1257.txt":"c28a0c9f964fcb2b46d21f537c402446501a2800670481d6abf9fd9e9018d523","doc/windows-1258.txt":"5019ae4d61805c79aacbf17c93793342dbb098d65a1837783bc3e2c6d6a23602","doc/windows-874.txt":"4ef0e4501c5feba8b17aee1818602ed44b36ca8475db771ce2fc16d392cabecc","doc/x-mac-cyrillic.txt":"58be154d8a888ca3d484b83b44f749823ef339ab27f14d90ca9a856f5050a8bd","doc/x-user-defined.txt":"f9cd07c4321bf5cfb0be4bdddd251072999b04a6cf7a6f5bc63709a84e2c1ffc","generate-encoding-data.py":"be989dd25c6b946e3e8745fdc8e8a80fcf24b3be99ad0b4b78153ba3f6ab6310","rustfmt.toml":"85c1a3b4382fd89e991cbb81b70fb52780472edc064c963943cdaaa56e0a2030","src/ascii.rs":"588e38b01e666d5e7462617ea7e90a108d608dec9e016f3d273ac0744af2e05d","src/big5.rs":"ec6e2913011a38e9a3e825a1731f139a7ca1d5b264fefae51a3cc1a68a57cef9","src/data.rs":"8a617cc57032092d65850eb27e00de687c80aea3299e839a1f58b42d0b35abf3","src/euc_jp.rs":"32047f5b540188c4cb19c07165f846b9786a09f18e315ed3e9bda1293dae52aa","src/euc_kr.rs":"9b25afc72d9378700eecfac58d55ad1c5946d6cd0ccde2c29c08200ef2de6bb9","src/gb18030.rs":"808587168d73f0c80f8520f0ca9b161866ed2efeb17a05e85fdf3b8efe7ba28a","src/handles.rs":"b08cef1f5785bb6a4822f2e844c6df1b046b737b7a075e4593eaa8c4208e9fe2","src/iso_2022_jp.rs":"9bb485e82574f4b7d4b2364f0ff276acb6a0bc111758420a3b0ec5e04c196652","src/lib.rs":"834f44b670ec48ee82c0e12223d1567313fdd9f88bca5f4b117c82c1828f559f","src/macros.rs":"200997f8870de8bfd8cdc475e92115df42108c0df661e49d3d1cbc32056e1d99","src/mem.rs":"948571137d3b151df8db4fb2c733e74ae595d055cdf0ad83abcab9341d6adabe","src/replacement.rs":"7660b34a53f8c1ca2bdfa0e51e843ec28326950952ad8bc96569feb93ac62308","src/shift_jis.rs":"6951ae67e36b1a12fa3a30734957f444d8b1b4ae0e2bde52060b29bd0f16d9d9","src/simd_funcs.rs":"05c6e77af74bfe73cd39a752067c11425d6b46e5da419910f54bf75a5c02a984","src/single_byte.rs":"3ad87116fb339434a4b58e8f2b15485f2b66b9f7814d708f16194ed08f6d6ccf","src/test_data/big5_in.txt":"4c5a8691f8dc717311889c63894026d2fb62725a86c4208ca274a9cc8d42a503","src/test_data/big5_in_ref.txt":"99d399e17750cf9c7cf30bb253dbfe35b81c4fcbdead93cfa48b1429213473c7","src/test_data/big5_out.txt":"6193ca97c297aa20e09396038d18e938bb7ea331c26f0f2454097296723a0b13","src/test_data/big5_out_ref.txt":"36567691f557df144f6cc520015a87038dfa156f296fcf103b56ae9a718be1fc","src/test_data/euc_kr_in.txt":"c86a7224f3215fa0d04e685622a752fdc72763e8ae076230c7fd62de57ec4074","src/test_data/euc_kr_in_ref.txt":"1f419f4ca47d708b54c73c461545a022ae2e20498fdbf8005a483d752a204883","src/test_data/euc_kr_out.txt":"e7f32e026f70be1e1b58e0047baf7d3d2c520269c4f9b9992e158b4decb0a1a3","src/test_data/euc_kr_out_ref.txt":"c9907857980b20b8e9e3b584482ed6567a2be6185d72237b6322f0404944924e","src/test_data/gb18030_in.txt":"ab7231b2d3e9afacdbd7d7f3b9e5361a7ff9f7e1cfdb4f3bd905b9362b309e53","src/test_data/gb18030_in_ref.txt":"dc5069421adca2043c55f5012b55a76fdff651d22e6e699fd0978f8d5706815c","src/test_data/gb18030_out.txt":"f0208d527f5ca63de7d9a0323be8d5cf12d8a104b2943d92c2701f0c3364dac1","src/test_data/gb18030_out_ref.txt":"6819fe47627e4ea01027003fc514b9f21a1322e732d7f1fb92cc6c5455bc6c07","src/test_data/iso_2022_jp_in.txt":"cd24bbdcb1834e25db54646fbf4c41560a13dc7540f6be3dba4f5d97d44513af","src/test_data/iso_2022_jp_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/iso_2022_jp_out.txt":"9b6f015329dda6c3f9ee5ce6dbd6fa9c89acc21283e886836c78b8d833480c21","src/test_data/iso_2022_jp_out_ref.txt":"78cb260093a20116ad9a42f43b05d1848c5ab100b6b9a850749809e943884b35","src/test_data/jis0208_in.txt":"6df3030553ffb0a6615bb33dc8ea9dca6d9623a9028e2ffec754ce3c3da824cc","src/test_data/jis0208_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/jis0208_out.txt":"4ec24477e1675ce750733bdc3c5add1cd27b6bd4ce1f09289564646e9654e857","src/test_data/jis0208_out_ref.txt":"c3e1cef5032b2b1d93a406f31ff940c4e2dfe8859b8b17ca2761fee7a75a0e48","src/test_data/jis0212_in.txt":"c011f0dd72bd7c8cd922df9374ef8d2769a77190514c77f6c62b415852eeb9fe","src/test_data/jis0212_in_ref.txt":"7d9458b3d2f73e7092a7f505c08ce1d233dde18aa679fbcf9889256239cc9e06","src/test_data/shift_jis_in.txt":"02e389ccef0dd2122e63f503899402cb7f797912c2444cc80ab93131116c5524","src/test_data/shift_jis_in_ref.txt":"512f985950ca902e643c88682dba9708b7c38d3c5ec2925168ab00ac94ab19f9","src/test_data/shift_jis_out.txt":"5fbc44da7bf639bf6cfe0fa1fd3eba7102b88f81919c9ea991302712f69426fb","src/test_data/shift_jis_out_ref.txt":"466322c6fed8286c64582731755290c2296508efdd258826e6279686649b481f","src/test_labels_names.rs":"23a2e11b02b3b8d15fb5613a625e3edb2c61e70e3c581abfd638719a4088200d","src/testing.rs":"f59e671e95a98a56f6b573e8c6be4d71e670bf52f7e20eb1605d990aafa1894e","src/utf_16.rs":"c071a147fad38d750c2c247e141b76b929a48007b99f26b2922b9caecdaf2f25","src/utf_8.rs":"7b7d887b347f1aefa03246b028a36a72758a4ce76c28f3b45c19467851aa7839","src/variant.rs":"1fab5363588a1554a7169de8731ea9cded7ac63ea35caabdd1c27a8dde68c27b","src/x_user_defined.rs":"9456ca46168ef86c98399a2536f577ef7be3cdde90c0c51392d8ac48519d3fae"},"package":"b45de904aa0b010bce2ab45264d0631681847fa7b6f2eaa7dab7619943bc4f59"}
+\ No newline at end of file
+diff --git a/third_party/rust/encoding_rs/Cargo.toml
b/third_party/rust/encoding_rs/Cargo.toml
+index e9fd6c0af257..08bb61136b79 100644
+--- a/third_party/rust/encoding_rs/Cargo.toml
++++ b/third_party/rust/encoding_rs/Cargo.toml
+@@ -11,38 +11,39 @@
+
+ [package]
+ edition = "2018"
++rust-version = "1.36"
+ name = "encoding_rs"
+-version = "0.8.33"
++version = "0.8.34"
+ authors = ["Henri Sivonen <hsivonen AT hsivonen.fi>"]
+ description = "A Gecko-oriented implementation of the Encoding Standard"
+ homepage = "https://docs.rs/encoding_rs/"
+ documentation = "https://docs.rs/encoding_rs/"
+ readme = "README.md"
+ keywords = [
+ "encoding",
+ "web",
+ "unicode",
+ "charset",
+ ]
+ categories = [
+ "text-processing",
+ "encoding",
+ "web-programming",
+ "internationalization",
+ ]
+ license = "(Apache-2.0 OR MIT) AND BSD-3-Clause"
+ repository = "https://github.com/hsivonen/encoding_rs"
+
+ [profile.release]
+ lto = true
+
++[dependencies.any_all_workaround]
++version = "0.1.0"
++optional = true
++
+ [dependencies.cfg-if]
+ version = "1.0"
+
+-[dependencies.packed_simd]
+-version = "0.3.9"
+-optional = true
+-
+ [dependencies.serde]
+ version = "1.0"
+ optional = true
+@@ -74,10 +75,4 @@ fast-legacy-encode = [
+ less-slow-big5-hanzi-encode = []
+ less-slow-gb-hanzi-encode = []
+ less-slow-kanji-encode = []
+-simd-accel = [
+- "packed_simd",
+- "packed_simd/into_bits",
+-]
+-
+-[badges.travis-ci]
+-repository = "hsivonen/encoding_rs"
++simd-accel = ["any_all_workaround"]
+diff --git a/third_party/rust/encoding_rs/README.md
b/third_party/rust/encoding_rs/README.md
+index c0b596c95199..ed0e954630f7 100644
+--- a/third_party/rust/encoding_rs/README.md
++++ b/third_party/rust/encoding_rs/README.md
+@@ -167,40 +167,26 @@ There are currently these optional cargo features:
+
+ ### `simd-accel`
+
+-Enables SIMD acceleration using the nightly-dependent `packed_simd` crate.
++Enables SIMD acceleration using the nightly-dependent `portable_simd`
standard
++library feature.
+
+ This is an opt-in feature, because enabling this feature _opts out_ of
Rust's
+ guarantees of future compilers compiling old code (aka. "stability story").
+
+ Currently, this has not been tested to be an improvement except for these
+-targets:
++targets and enabling the `simd-accel` feature is expected to break the build
++on other targets:
+
+ * x86_64
+ * i686
+ * aarch64
+ * thumbv7neon
+
+ If you use nightly Rust, you use targets whose first component is one of the
+ above, and you are prepared _to have to revise your configuration when
updating
+ Rust_, you should enable this feature. Otherwise, please _do not_ enable
this
+ feature.
+
+-_Note!_ If you are compiling for a target that does not have 128-bit SIMD
+-enabled as part of the target definition and you are enabling 128-bit SIMD
+-using `-C target_feature`, you need to enable the `core_arch` Cargo feature
+-for `packed_simd` to compile a crates.io snapshot of `core_arch` instead of
+-using the standard-library copy of `core::arch`, because the `core::arch`
+-module of the pre-compiled standard library has been compiled with the
+-assumption that the CPU doesn't have 128-bit SIMD. At present this applies
+-mainly to 32-bit ARM targets whose first component does not include the
+-substring `neon`.
+-
+-The encoding_rs side of things has not been properly set up for POWER,
+-PowerPC, MIPS, etc., SIMD at this time, so even if you were to follow
+-the advice from the previous paragraph, you probably shouldn't use
+-the `simd-accel` option on the less mainstream architectures at this
+-time.
+-
+ Used by Firefox.
+
+ ### `serde`
+@@ -381,8 +367,9 @@ as semver-breaking, because this crate depends on
`cfg-if`, which doesn't
+ appear to treat MSRV changes as semver-breaking, so it would be useless for
+ this crate to treat MSRV changes as semver-breaking.
+
+-As of 2021-02-04, MSRV appears to be Rust 1.36.0 for using the crate and
++As of 2024-04-04, MSRV appears to be Rust 1.36.0 for using the crate and
+ 1.42.0 for doc tests to pass without errors about the global allocator.
++With the `simd-accel` feature, the MSRV is even higher.
+
+ ## Compatibility with rust-encoding
+
+@@ -446,10 +433,17 @@ To regenerate the generated code:
+ - [x] Add actually fast CJK encode options.
+ - [ ] ~Investigate [Bob Steagall's lookup table acceleration for
UTF-8](https://github.com/BobSteagall/CppNow2018/blob/master/FastConversionFromUTF-8/Fast%20Conversion%20From%20UTF-8%20with%20C%2B%2B%2C%20DFAs%2C%20and%20SSE%20Intrinsics%20-%20Bob%20Steagall%20-%20C%2B%2BNow%202018.pdf).~
+ - [x] Provide a build mode that works without `alloc` (with lesser API
surface).
+-- [ ] Migrate to `std::simd` once it is stable and declare 1.0.
++- [x] Migrate to `std::simd` ~once it is stable and declare 1.0.~
++- [ ] Migrate `unsafe` slice access by larger types than `u8`/`u16` to
`align_to`.
+
+ ## Release Notes
+
++### 0.8.34
++
++* Use the `portable_simd` nightly feature of the standard library instead
of the `packed_simd` crate. Only affects the `simd-accel` optional nightly
feature.
++* Internal documentation improvements and minor code improvements around
`unsafe`.
++* Added `rust-version` to `Cargo.toml`.
++
+ ### 0.8.33
+
+ * Use `packed_simd` instead of `packed_simd_2` again now that updates are
back under the `packed_simd` name. Only affects the `simd-accel` optional
nightly feature.
+diff --git a/third_party/rust/encoding_rs/src/ascii.rs
b/third_party/rust/encoding_rs/src/ascii.rs
+index 90644de7a474..80233f285e7a 100644
+--- a/third_party/rust/encoding_rs/src/ascii.rs
++++ b/third_party/rust/encoding_rs/src/ascii.rs
+@@ -51,61 +51,77 @@ cfg_if! {
+ }
+ }
+
++// Safety invariants for masks: data & mask = 0 for valid ASCII or basic
latin utf-16
++
+ // `as` truncates, so works on 32-bit, too.
+ #[allow(dead_code)]
+ pub const ASCII_MASK: usize = 0x8080_8080_8080_8080u64 as usize;
+
+ // `as` truncates, so works on 32-bit, too.
+ #[allow(dead_code)]
+ pub const BASIC_LATIN_MASK: usize = 0xFF80_FF80_FF80_FF80u64 as usize;
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_naive {
+ ($name:ident, $src_unit:ty, $dst_unit:ty) => {
++ /// Safety: src and dst must have len_unit elements and be aligned
++ /// Safety-usable invariant: will return Some() when it fails
++ /// to convert. The first value will be a u8 that is > 127.
+ #[inline(always)]
+ pub unsafe fn $name(
+ src: *const $src_unit,
+ dst: *mut $dst_unit,
+ len: usize,
+ ) -> Option<($src_unit, usize)> {
+ // Yes, manually omitting the bound check here matters
+ // a lot for perf.
+ for i in 0..len {
++ // Safety: len invariant used here
+ let code_unit = *(src.add(i));
++ // Safety: Upholds safety-usable invariant here
+ if code_unit > 127 {
+ return Some((code_unit, i));
+ }
++ // Safety: len invariant used here
+ *(dst.add(i)) = code_unit as $dst_unit;
+ }
+ return None;
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_alu {
+ ($name:ident,
++ // safety invariant: src/dst MUST be u8
+ $src_unit:ty,
+ $dst_unit:ty,
++ // Safety invariant: stride_fn must consume and produce two usizes,
and return the index of the first non-ascii when it fails
+ $stride_fn:ident) => {
++ /// Safety: src and dst must have len elements, src is valid for
read, dst is valid for
++ /// write
++ /// Safety-usable invariant: will return Some() when it fails
++ /// to convert. The first value will be a u8 that is > 127.
+ #[cfg_attr(feature = "cargo-clippy", allow(never_loop,
cast_ptr_alignment))]
+ #[inline(always)]
+ pub unsafe fn $name(
+ src: *const $src_unit,
+ dst: *mut $dst_unit,
+ len: usize,
+ ) -> Option<($src_unit, usize)> {
+ let mut offset = 0usize;
+ // This loop is only broken out of as a `goto` forward
+ loop {
++ // Safety: until_alignment becomes the number of bytes we
need to munch until we are aligned to usize
+ let mut until_alignment = {
+ // Check if the other unit aligns if we move the
narrower unit
+ // to alignment.
+ // if ::core::mem::size_of::<$src_unit>()
== ::core::mem::size_of::<$dst_unit>() {
+ // ascii_to_ascii
+ let src_alignment = (src as usize) & ALU_ALIGNMENT_MASK;
+ let dst_alignment = (dst as usize) & ALU_ALIGNMENT_MASK;
+ if src_alignment != dst_alignment {
++ // Safety: bails early and ends up in the naïve
branch where usize-alignment doesn't matter
+ break;
+ }
+ (ALU_ALIGNMENT - src_alignment) & ALU_ALIGNMENT_MASK
+@@ -134,64 +150,94 @@ macro_rules! ascii_alu {
+ // x86_64 should be using SSE2 in due course, keeping
the move
+ // to alignment here. It would be good to test on more
ARM CPUs
+ // and on real MIPS and POWER hardware.
++ //
++ // Safety: This is the naïve code once again, for
`until_alignment` bytes
+ while until_alignment != 0 {
+ let code_unit = *(src.add(offset));
+ if code_unit > 127 {
++ // Safety: Upholds safety-usable invariant here
+ return Some((code_unit, offset));
+ }
+ *(dst.add(offset)) = code_unit as $dst_unit;
++ // Safety: offset is the number of bytes copied so
far
+ offset += 1;
+ until_alignment -= 1;
+ }
+ let len_minus_stride = len - ALU_STRIDE_SIZE;
+ loop {
++ // Safety: num_ascii is known to be a byte index of
a non-ascii byte due to stride_fn's invariant
+ if let Some(num_ascii) = $stride_fn(
++ // Safety: These are known to be valid and
aligned since we have at
++ // least ALU_STRIDE_SIZE data in these buffers,
and offset is the
++ // number of elements copied so far, which
according to the
++ // until_alignment calculation above will cause
both src and dst to be
++ // aligned to usize after this add
+ src.add(offset) as *const usize,
+ dst.add(offset) as *mut usize,
+ ) {
+ offset += num_ascii;
++ // Safety: Upholds safety-usable invariant here
by indexing into non-ascii byte
+ return Some((*(src.add(offset)), offset));
+ }
++ // Safety: offset continues to be the number of
bytes copied so far, and
++ // maintains usize alignment for the next loop
iteration
+ offset += ALU_STRIDE_SIZE;
++ // Safety: This is `offset > len - stride. This
loop will continue as long as
++ // `offset <= len - stride`, which means there are
`stride` bytes to still be read.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ break;
+ }
++
++ // Safety: This is the naïve code, same as ascii_naive, and has
no requirements
++ // other than src/dst being valid for the the right lens
+ while offset < len {
++ // Safety: len invariant used here
+ let code_unit = *(src.add(offset));
+ if code_unit > 127 {
++ // Safety: Upholds safety-usable invariant here
+ return Some((code_unit, offset));
+ }
++ // Safety: len invariant used here
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ None
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! basic_latin_alu {
+ ($name:ident,
++ // safety invariant: use u8 for src/dest for ascii, and u16 for
basic_latin
+ $src_unit:ty,
+ $dst_unit:ty,
++ // safety invariant: stride function must munch
ALU_STRIDE_SIZE*size(src_unit) bytes off of src and
++ // write ALU_STRIDE_SIZE*size(dst_unit) bytes to dst
+ $stride_fn:ident) => {
++ /// Safety: src and dst must have len elements, src is valid for
read, dst is valid for
++ /// write
++ /// Safety-usable invariant: will return Some() when it fails
++ /// to convert. The first value will be a u8 that is > 127.
+ #[cfg_attr(
+ feature = "cargo-clippy",
+ allow(never_loop, cast_ptr_alignment, cast_lossless)
+ )]
+ #[inline(always)]
+ pub unsafe fn $name(
+ src: *const $src_unit,
+ dst: *mut $dst_unit,
+ len: usize,
+ ) -> Option<($src_unit, usize)> {
+ let mut offset = 0usize;
+ // This loop is only broken out of as a `goto` forward
+ loop {
++ // Safety: until_alignment becomes the number of bytes we
need to munch from src/dest until we are aligned to usize
++ // We ensure basic-latin has the same alignment as ascii,
starting with ascii since it is smaller.
+ let mut until_alignment = {
+ // Check if the other unit aligns if we move the
narrower unit
+ // to alignment.
+@@ -237,1251 +283,1581 @@ macro_rules! basic_latin_alu {
+ // x86_64 should be using SSE2 in due course, keeping
the move
+ // to alignment here. It would be good to test on more
ARM CPUs
+ // and on real MIPS and POWER hardware.
++ //
++ // Safety: This is the naïve code once again, for
`until_alignment` bytes
+ while until_alignment != 0 {
+ let code_unit = *(src.add(offset));
+ if code_unit > 127 {
++ // Safety: Upholds safety-usable invariant here
+ return Some((code_unit, offset));
+ }
+ *(dst.add(offset)) = code_unit as $dst_unit;
++ // Safety: offset is the number of bytes copied so
far
+ offset += 1;
+ until_alignment -= 1;
+ }
+ let len_minus_stride = len - ALU_STRIDE_SIZE;
+ loop {
+ if !$stride_fn(
++ // Safety: These are known to be valid and
aligned since we have at
++ // least ALU_STRIDE_SIZE data in these buffers,
and offset is the
++ // number of elements copied so far, which
according to the
++ // until_alignment calculation above will cause
both src and dst to be
++ // aligned to usize after this add
+ src.add(offset) as *const usize,
+ dst.add(offset) as *mut usize,
+ ) {
+ break;
+ }
++ // Safety: offset continues to be the number of
bytes copied so far, and
++ // maintains usize alignment for the next loop
iteration
+ offset += ALU_STRIDE_SIZE;
++ // Safety: This is `offset > len - stride. This
loop will continue as long as
++ // `offset <= len - stride`, which means there are
`stride` bytes to still be read.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ break;
+ }
++ // Safety: This is the naïve code once again, for leftover bytes
+ while offset < len {
++ // Safety: len invariant used here
+ let code_unit = *(src.add(offset));
+ if code_unit > 127 {
++ // Safety: Upholds safety-usable invariant here
+ return Some((code_unit, offset));
+ }
++ // Safety: len invariant used here
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ None
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! latin1_alu {
++ // safety invariant: stride function must munch
ALU_STRIDE_SIZE*size(src_unit) bytes off of src and
++ // write ALU_STRIDE_SIZE*size(dst_unit) bytes to dst
+ ($name:ident, $src_unit:ty, $dst_unit:ty, $stride_fn:ident) => {
++ /// Safety: src and dst must have len elements, src is valid for
read, dst is valid for
++ /// write
+ #[cfg_attr(
+ feature = "cargo-clippy",
+ allow(never_loop, cast_ptr_alignment, cast_lossless)
+ )]
+ #[inline(always)]
+ pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit,
len: usize) {
+ let mut offset = 0usize;
+ // This loop is only broken out of as a `goto` forward
+ loop {
++ // Safety: until_alignment becomes the number of bytes we
need to munch from src/dest until we are aligned to usize
++ // We ensure the UTF-16 side has the same alignment as the
Latin-1 side, starting with Latin-1 since it is smaller.
+ let mut until_alignment = {
+ if ::core::mem::size_of::<$src_unit>() <
::core::mem::size_of::<$dst_unit>() {
+ // unpack
+ let src_until_alignment = (ALU_ALIGNMENT
+ - ((src as usize) & ALU_ALIGNMENT_MASK))
+ & ALU_ALIGNMENT_MASK;
+ if (dst.wrapping_add(src_until_alignment) as usize)
& ALU_ALIGNMENT_MASK
+ != 0
+ {
+ break;
+ }
+ src_until_alignment
+ } else {
+ // pack
+ let dst_until_alignment = (ALU_ALIGNMENT
+ - ((dst as usize) & ALU_ALIGNMENT_MASK))
+ & ALU_ALIGNMENT_MASK;
+ if (src.wrapping_add(dst_until_alignment) as usize)
& ALU_ALIGNMENT_MASK
+ != 0
+ {
+ break;
+ }
+ dst_until_alignment
+ }
+ };
+ if until_alignment + ALU_STRIDE_SIZE <= len {
++ // Safety: This is the naïve code once again, for
`until_alignment` bytes
+ while until_alignment != 0 {
+ let code_unit = *(src.add(offset));
+ *(dst.add(offset)) = code_unit as $dst_unit;
++ // Safety: offset is the number of bytes copied so
far
+ offset += 1;
+ until_alignment -= 1;
+ }
+ let len_minus_stride = len - ALU_STRIDE_SIZE;
+ loop {
+ $stride_fn(
++ // Safety: These are known to be valid and
aligned since we have at
++ // least ALU_STRIDE_SIZE data in these buffers,
and offset is the
++ // number of elements copied so far, which
according to the
++ // until_alignment calculation above will cause
both src and dst to be
++ // aligned to usize after this add
+ src.add(offset) as *const usize,
+ dst.add(offset) as *mut usize,
+ );
++ // Safety: offset continues to be the number of
bytes copied so far, and
++ // maintains usize alignment for the next loop
iteration
+ offset += ALU_STRIDE_SIZE;
++ // Safety: This is `offset > len - stride. This
loop will continue as long as
++ // `offset <= len - stride`, which means there are
`stride` bytes to still be read.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ break;
+ }
++ // Safety: This is the naïve code once again, for leftover bytes
+ while offset < len {
++ // Safety: len invariant used here
+ let code_unit = *(src.add(offset));
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_simd_check_align {
+ (
+ $name:ident,
+ $src_unit:ty,
+ $dst_unit:ty,
++ // Safety: This function must require aligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_both_aligned:ident,
++ // Safety: This function must require aligned/unaligned src/dest
that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_src_aligned:ident,
++ // Safety: This function must require unaligned/aligned src/dest
that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_dst_aligned:ident,
++ // Safety: This function must require unaligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_neither_aligned:ident
+ ) => {
++ /// Safety: src/dst must be valid for reads/writes of `len`
elements of their units.
++ ///
++ /// Safety-usable invariant: will return Some() when it encounters
non-ASCII, with the first element in the Some being
++ /// guaranteed to be non-ASCII (> 127), and the second being the
offset where it is found
+ #[inline(always)]
+ pub unsafe fn $name(
+ src: *const $src_unit,
+ dst: *mut $dst_unit,
+ len: usize,
+ ) -> Option<($src_unit, usize)> {
+ let mut offset = 0usize;
++ // Safety: if this check succeeds we're valid for
reading/writing at least `SIMD_STRIDE_SIZE` elements.
+ if SIMD_STRIDE_SIZE <= len {
+ let len_minus_stride = len - SIMD_STRIDE_SIZE;
+ // XXX Should we first process one stride unconditionally
as unaligned to
+ // avoid the cost of the branchiness below if the first
stride fails anyway?
+ // XXX Should we just use unaligned SSE2 access
unconditionally? It seems that
+ // on Haswell, it would make sense to just use unaligned
and not bother
+ // checking. Need to benchmark older architectures before
deciding.
+ let dst_masked = (dst as usize) & SIMD_ALIGNMENT_MASK;
++ // Safety: checking whether src is aligned
+ if ((src as usize) & SIMD_ALIGNMENT_MASK) == 0 {
++ // Safety: Checking whether dst is aligned
+ if dst_masked == 0 {
+ loop {
++ // Safety: We're valid to read/write
SIMD_STRIDE_SIZE elements and have the appropriate alignments
+ if !$stride_both_aligned(src.add(offset),
dst.add(offset)) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ } else {
+ loop {
++ // Safety: We're valid to read/write
SIMD_STRIDE_SIZE elements and have the appropriate alignments
+ if !$stride_src_aligned(src.add(offset),
dst.add(offset)) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ } else {
+ if dst_masked == 0 {
+ loop {
++ // Safety: We're valid to read/write
SIMD_STRIDE_SIZE elements and have the appropriate alignments
+ if !$stride_dst_aligned(src.add(offset),
dst.add(offset)) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ } else {
+ loop {
++ // Safety: We're valid to read/write
SIMD_STRIDE_SIZE elements and have the appropriate alignments
+ if !$stride_neither_aligned(src.add(offset),
dst.add(offset)) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ }
+ }
+ while offset < len {
++ // Safety: uses len invariant here and below
+ let code_unit = *(src.add(offset));
+ if code_unit > 127 {
++ // Safety: upholds safety-usable invariant
+ return Some((code_unit, offset));
+ }
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ None
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_simd_check_align_unrolled {
+ (
+ $name:ident,
+ $src_unit:ty,
+ $dst_unit:ty,
++ // Safety: This function must require aligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_both_aligned:ident,
++ // Safety: This function must require aligned/unaligned src/dest
that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_src_aligned:ident,
++ // Safety: This function must require unaligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_neither_aligned:ident,
++ // Safety: This function must require aligned src/dest that are
valid for reading/writing 2*SIMD_STRIDE_SIZE src_unit/dst_unit
+ $double_stride_both_aligned:ident,
++ // Safety: This function must require aligned/unaligned src/dest
that are valid for reading/writing 2*SIMD_STRIDE_SIZE src_unit/dst_unit
+ $double_stride_src_aligned:ident
+ ) => {
+- #[inline(always)]
++ /// Safety: src/dst must be valid for reads/writes of `len`
elements of their units.
++ ///
++ /// Safety-usable invariant: will return Some() when it encounters
non-ASCII, with the first element in the Some being
++ /// guaranteed to be non-ASCII (> 127), and the second being the
offset where it is found #[inline(always)]
+ pub unsafe fn $name(
+ src: *const $src_unit,
+ dst: *mut $dst_unit,
+ len: usize,
+ ) -> Option<($src_unit, usize)> {
+ let unit_size = ::core::mem::size_of::<$src_unit>();
+ let mut offset = 0usize;
+ // This loop is only broken out of as a goto forward without
+ // actually looping
+ 'outer: loop {
++ // Safety: if this check succeeds we're valid for
reading/writing at least `SIMD_STRIDE_SIZE` elements.
+ if SIMD_STRIDE_SIZE <= len {
+ // First, process one unaligned
++ // Safety: this is safe to call since we're valid for
this read/write
+ if !$stride_neither_aligned(src, dst) {
+ break 'outer;
+ }
+ offset = SIMD_STRIDE_SIZE;
+
+ // We have now seen 16 ASCII bytes. Let's guess that
+ // there will be enough more to justify more expense
+ // in the case of non-ASCII.
+ // Use aligned reads for the sake of old
microachitectures.
++ //
++ // Safety: this correctly calculates the number of
src_units that need to be read before the remaining list is aligned.
++ // This is less that SIMD_ALIGNMENT, which is also
SIMD_STRIDE_SIZE (as documented)
+ let until_alignment = ((SIMD_ALIGNMENT
+ - ((src.add(offset) as usize) &
SIMD_ALIGNMENT_MASK))
+ & SIMD_ALIGNMENT_MASK)
+ / unit_size;
+- // This addition won't overflow, because even in the
32-bit PAE case the
++ // Safety: This addition won't overflow, because even
in the 32-bit PAE case the
+ // address space holds enough code that the slice
length can't be that
+ // close to address space size.
+ // offset now equals SIMD_STRIDE_SIZE, hence times 3
below.
++ //
++ // Safety: if this check succeeds we're valid for
reading/writing at least `2 * SIMD_STRIDE_SIZE` elements plus
`until_alignment`.
++ // The extra SIMD_STRIDE_SIZE in the condition is
because `offset` is already `SIMD_STRIDE_SIZE`.
+ if until_alignment + (SIMD_STRIDE_SIZE * 3) <= len {
+ if until_alignment != 0 {
++ // Safety: this is safe to call since we're
valid for this read/write (and more), and don't care about alignment
++ // This will copy over bytes that get decoded
twice since it's not incrementing `offset` by SIMD_STRIDE_SIZE. This is fine.
+ if !$stride_neither_aligned(src.add(offset),
dst.add(offset)) {
+ break;
+ }
+ offset += until_alignment;
+ }
++ // Safety: At this point we're valid for
reading/writing 2*SIMD_STRIDE_SIZE elements
++ // Safety: Now `offset` is aligned for `src`
+ let len_minus_stride_times_two = len -
(SIMD_STRIDE_SIZE * 2);
++ // Safety: This is whether dst is aligned
+ let dst_masked = (dst.add(offset) as usize) &
SIMD_ALIGNMENT_MASK;
+ if dst_masked == 0 {
+ loop {
++ // Safety: both are aligned, we can call
the aligned function. We're valid for reading/writing double stride from the
initial condition
++ // and the loop break condition below
+ if let Some(advance) =
+
$double_stride_both_aligned(src.add(offset), dst.add(offset))
+ {
+ offset += advance;
+ let code_unit = *(src.add(offset));
++ // Safety: uses safety-usable invariant
on ascii_to_ascii_simd_double_stride to return
++ // guaranteed non-ascii
+ return Some((code_unit, offset));
+ }
+ offset += SIMD_STRIDE_SIZE * 2;
++ // Safety: This is `offset > len - 2 *
SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride_times_two {
+ break;
+ }
+ }
++ // Safety: We're valid for reading/writing one
more, and can still assume alignment
+ if offset + SIMD_STRIDE_SIZE <= len {
+ if !$stride_both_aligned(src.add(offset),
dst.add(offset)) {
+ break 'outer;
+ }
+ offset += SIMD_STRIDE_SIZE;
+ }
+ } else {
+ loop {
++ // Safety: only src is aligned here. We're
valid for reading/writing double stride from the initial condition
++ // and the loop break condition below
+ if let Some(advance) =
+
$double_stride_src_aligned(src.add(offset), dst.add(offset))
+ {
+ offset += advance;
+ let code_unit = *(src.add(offset));
++ // Safety: uses safety-usable invariant
on ascii_to_ascii_simd_double_stride to return
++ // guaranteed non-ascii
+ return Some((code_unit, offset));
+ }
+ offset += SIMD_STRIDE_SIZE * 2;
++ // Safety: This is `offset > len - 2 *
SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE`
elements to munch next time.
++
+ if offset > len_minus_stride_times_two {
+ break;
+ }
+ }
++ // Safety: We're valid for reading/writing one
more, and can still assume alignment
+ if offset + SIMD_STRIDE_SIZE <= len {
+ if !$stride_src_aligned(src.add(offset),
dst.add(offset)) {
+ break 'outer;
+ }
+ offset += SIMD_STRIDE_SIZE;
+ }
+ }
+ } else {
+ // At most two iterations, so unroll
+ if offset + SIMD_STRIDE_SIZE <= len {
++ // Safety: The check above ensures we're
allowed to read/write this, and we don't use alignment
+ if !$stride_neither_aligned(src.add(offset),
dst.add(offset)) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
+ if offset + SIMD_STRIDE_SIZE <= len {
++ // Safety: The check above ensures we're
allowed to read/write this, and we don't use alignment
+ if
!$stride_neither_aligned(src.add(offset), dst.add(offset)) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
+ }
+ }
+ }
+ }
+ break 'outer;
+ }
+ while offset < len {
++ // Safety: relies straightforwardly on the `len` invariant
+ let code_unit = *(src.add(offset));
+ if code_unit > 127 {
++ // Safety-usable invariant upheld here
+ return Some((code_unit, offset));
+ }
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ None
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! latin1_simd_check_align {
+ (
+ $name:ident,
+ $src_unit:ty,
+ $dst_unit:ty,
++ // Safety: This function must require aligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_both_aligned:ident,
++ // Safety: This function must require aligned/unaligned src/dest
that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_src_aligned:ident,
++ // Safety: This function must require unaligned/aligned src/dest
that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_dst_aligned:ident,
++ // Safety: This function must require unaligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_neither_aligned:ident
++
+ ) => {
++ /// Safety: src/dst must be valid for reads/writes of `len`
elements of their units.
+ #[inline(always)]
+ pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit,
len: usize) {
+ let mut offset = 0usize;
++ // Safety: if this check succeeds we're valid for
reading/writing at least `SIMD_STRIDE_SIZE` elements.
+ if SIMD_STRIDE_SIZE <= len {
+ let len_minus_stride = len - SIMD_STRIDE_SIZE;
++ // Whether dst is aligned
+ let dst_masked = (dst as usize) & SIMD_ALIGNMENT_MASK;
++ // Whether src is aligned
+ if ((src as usize) & SIMD_ALIGNMENT_MASK) == 0 {
+ if dst_masked == 0 {
+ loop {
++ // Safety: Both were aligned, we can use the
aligned function
+ $stride_both_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for
++ // reading/writing at least SIMD_STRIDE_SIZE
elements.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ } else {
+ loop {
++ // Safety: src was aligned, dst was not
+ $stride_src_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for
++ // reading/writing at least SIMD_STRIDE_SIZE
elements.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ } else {
+ if dst_masked == 0 {
+ loop {
++ // Safety: src was aligned, dst was not
+ $stride_dst_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for
++ // reading/writing at least SIMD_STRIDE_SIZE
elements.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ } else {
+ loop {
++ // Safety: Neither were aligned
+ $stride_neither_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len -
SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for
++ // reading/writing at least SIMD_STRIDE_SIZE
elements.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ }
+ }
+ while offset < len {
++ // Safety: relies straightforwardly on the `len` invariant
+ let code_unit = *(src.add(offset));
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! latin1_simd_check_align_unrolled {
+ (
+ $name:ident,
+ $src_unit:ty,
+ $dst_unit:ty,
++ // Safety: This function must require aligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_both_aligned:ident,
++ // Safety: This function must require aligned/unaligned src/dest
that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_src_aligned:ident,
++ // Safety: This function must require unaligned/aligned src/dest
that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_dst_aligned:ident,
++ // Safety: This function must require unaligned src/dest that are
valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit
+ $stride_neither_aligned:ident
+ ) => {
++ /// Safety: src/dst must be valid for reads/writes of `len`
elements of their units.
+ #[inline(always)]
+ pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit,
len: usize) {
+ let unit_size = ::core::mem::size_of::<$src_unit>();
+ let mut offset = 0usize;
++ // Safety: if this check succeeds we're valid for
reading/writing at least `SIMD_STRIDE_SIZE` elements.
+ if SIMD_STRIDE_SIZE <= len {
++ // Safety: this correctly calculates the number of
src_units that need to be read before the remaining list is aligned.
++ // This is by definition less than SIMD_STRIDE_SIZE.
+ let mut until_alignment = ((SIMD_STRIDE_SIZE
+ - ((src as usize) & SIMD_ALIGNMENT_MASK))
+ & SIMD_ALIGNMENT_MASK)
+ / unit_size;
+ while until_alignment != 0 {
++ // Safety: This is a straightforward copy, since
until_alignment is < SIMD_STRIDE_SIZE < len, this is in-bounds
+ *(dst.add(offset)) = *(src.add(offset)) as $dst_unit;
+ offset += 1;
+ until_alignment -= 1;
+ }
++ // Safety: here offset will be `until_alignment`, i.e.
enough to align `src`.
+ let len_minus_stride = len - SIMD_STRIDE_SIZE;
++ // Safety: if this check succeeds we're valid for
reading/writing at least `2 * SIMD_STRIDE_SIZE` elements.
+ if offset + SIMD_STRIDE_SIZE * 2 <= len {
+ let len_minus_stride_times_two = len_minus_stride -
SIMD_STRIDE_SIZE;
++ // Safety: at this point src is known to be aligned at
offset, dst is not.
+ if (dst.add(offset) as usize) & SIMD_ALIGNMENT_MASK ==
0 {
+ loop {
++ // Safety: We checked alignment of dst above,
we can use the alignment functions. We're allowed to read/write
2*SIMD_STRIDE_SIZE elements, which we do.
+ $stride_both_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
+ $stride_both_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len - 2 *
SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride_times_two {
+ break;
+ }
+ }
+ } else {
+ loop {
++ // Safety: we ensured alignment of src already.
+ $stride_src_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
+ $stride_src_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len - 2 *
SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride_times_two {
+ break;
+ }
+ }
+ }
+ }
++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE` which
means we are valid to munch SIMD_STRIDE_SIZE more elements, which we do
+ if offset < len_minus_stride {
+ $stride_src_aligned(src.add(offset), dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
+ }
+ }
+ while offset < len {
++ // Safety: uses len invariant here and below
+ let code_unit = *(src.add(offset));
+ // On x86_64, this loop autovectorizes but in the pack
+ // case there are instructions whose purpose is to make sure
+ // each u16 in the vector is truncated before packing.
However,
+ // since we don't care about saturating behavior of SSE2
packing
+ // when the input isn't Latin1, those instructions are
useless.
+ // Unfortunately, using the `assume` intrinsic to lie to the
+ // optimizer doesn't make LLVM omit the trunctation that we
+ // don't need. Possibly this loop could be manually
optimized
+ // to do the sort of thing that LLVM does but without the
+ // ANDing the read vectors of u16 with a constant that
discards
+ // the high half of each u16. As far as I can tell, the
+ // optimization assumes that doing a SIMD read past the end
of
+ // the array is OK.
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_simd_unalign {
++ // Safety: stride_neither_aligned must be a function that requires
src/dest be valid for unaligned reads/writes for SIMD_STRIDE_SIZE elements of
type src_unit/dest_unit
+ ($name:ident, $src_unit:ty, $dst_unit:ty,
$stride_neither_aligned:ident) => {
++ /// Safety: src and dst must be valid for reads/writes of len
elements of type src_unit/dst_unit
++ ///
++ /// Safety-usable invariant: will return Some() when it encounters
non-ASCII, with the first element in the Some being
++ /// guaranteed to be non-ASCII (> 127), and the second being the
offset where it is found
+ #[inline(always)]
+ pub unsafe fn $name(
+ src: *const $src_unit,
+ dst: *mut $dst_unit,
+ len: usize,
+ ) -> Option<($src_unit, usize)> {
+ let mut offset = 0usize;
++ // Safety: if this check succeeds we're valid for
reading/writing at least `stride` elements.
+ if SIMD_STRIDE_SIZE <= len {
+ let len_minus_stride = len - SIMD_STRIDE_SIZE;
+ loop {
++ // Safety: We know we're valid for `stride`
reads/writes, so we can call this function. We don't need alignment.
+ if !$stride_neither_aligned(src.add(offset),
dst.add(offset)) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // This is `offset > len - stride` which means we
always have at least `stride` elements to munch next time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ while offset < len {
++ // Safety: Uses len invariant here and below
+ let code_unit = *(src.add(offset));
+ if code_unit > 127 {
++ // Safety-usable invariant upheld here
+ return Some((code_unit, offset));
+ }
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ None
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! latin1_simd_unalign {
++ // Safety: stride_neither_aligned must be a function that requires
src/dest be valid for unaligned reads/writes for SIMD_STRIDE_SIZE elements of
type src_unit/dest_unit
+ ($name:ident, $src_unit:ty, $dst_unit:ty,
$stride_neither_aligned:ident) => {
++ /// Safety: src and dst must be valid for unaligned reads/writes of
len elements of type src_unit/dst_unit
+ #[inline(always)]
+ pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit,
len: usize) {
+ let mut offset = 0usize;
++ // Safety: if this check succeeds we're valid for
reading/writing at least `stride` elements.
+ if SIMD_STRIDE_SIZE <= len {
+ let len_minus_stride = len - SIMD_STRIDE_SIZE;
+ loop {
++ // Safety: We know we're valid for `stride`
reads/writes, so we can call this function. We don't need alignment.
+ $stride_neither_aligned(src.add(offset),
dst.add(offset));
+ offset += SIMD_STRIDE_SIZE;
++ // This is `offset > len - stride` which means we
always have at least `stride` elements to munch next time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ while offset < len {
++ // Safety: Uses len invariant here
+ let code_unit = *(src.add(offset));
+ *(dst.add(offset)) = code_unit as $dst_unit;
+ offset += 1;
+ }
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_to_ascii_simd_stride {
++ // Safety: load/store must be valid for 16 bytes of read/write, which
may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)`
functions)
+ ($name:ident, $load:ident, $store:ident) => {
++ /// Safety: src and dst must be valid for 16 bytes of read/write
according to
++ /// the $load/$store fn, which may allow for unaligned reads/writes
or require
++ /// alignment to either 16x8 or u8x16.
+ #[inline(always)]
+ pub unsafe fn $name(src: *const u8, dst: *mut u8) -> bool {
+ let simd = $load(src);
+ if !simd_is_ascii(simd) {
+ return false;
+ }
+ $store(dst, simd);
+ true
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_to_ascii_simd_double_stride {
++ // Safety: store must be valid for 32 bytes of write, which may be
unaligned (candidates: `store(8|16)_(aligned|unaligned)`)
+ ($name:ident, $store:ident) => {
++ /// Safety: src must be valid for 32 bytes of aligned u8x16 read
++ /// dst must be valid for 32 bytes of unaligned write according to
++ /// the $store fn, which may allow for unaligned writes or require
++ /// alignment to either 16x8 or u8x16.
++ ///
++ /// Safety-usable invariant: Returns Some(index) if the element at
`index` is invalid ASCII
+ #[inline(always)]
+ pub unsafe fn $name(src: *const u8, dst: *mut u8) -> Option<usize> {
+ let first = load16_aligned(src);
+ let second = load16_aligned(src.add(SIMD_STRIDE_SIZE));
+ $store(dst, first);
+ if unlikely(!simd_is_ascii(first | second)) {
++ // Safety: mask_ascii produces a mask of all the high bits.
+ let mask_first = mask_ascii(first);
+ if mask_first != 0 {
++ // Safety: on little endian systems this will be the
number of ascii bytes
++ // before the first non-ascii, i.e. valid for indexing
src
++ // TODO SAFETY: What about big-endian systems?
+ return Some(mask_first.trailing_zeros() as usize);
+ }
+ $store(dst.add(SIMD_STRIDE_SIZE), second);
+ let mask_second = mask_ascii(second);
++ // Safety: on little endian systems this will be the number
of ascii bytes
++ // before the first non-ascii, i.e. valid for indexing src
+ return Some(SIMD_STRIDE_SIZE + mask_second.trailing_zeros()
as usize);
+ }
+ $store(dst.add(SIMD_STRIDE_SIZE), second);
+ None
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_to_basic_latin_simd_stride {
++ // Safety: load/store must be valid for 16 bytes of read/write, which
may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)`
functions)
+ ($name:ident, $load:ident, $store:ident) => {
++ /// Safety: src and dst must be valid for 16/32 bytes of read/write
according to
++ /// the $load/$store fn, which may allow for unaligned reads/writes
or require
++ /// alignment to either 16x8 or u8x16.
+ #[inline(always)]
+ pub unsafe fn $name(src: *const u8, dst: *mut u16) -> bool {
+ let simd = $load(src);
+ if !simd_is_ascii(simd) {
+ return false;
+ }
+ let (first, second) = simd_unpack(simd);
+ $store(dst, first);
+ $store(dst.add(8), second);
+ true
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! ascii_to_basic_latin_simd_double_stride {
++ // Safety: store must be valid for 16 bytes of write, which may be
unaligned
+ ($name:ident, $store:ident) => {
++ /// Safety: src must be valid for 2*SIMD_STRIDE_SIZE bytes of
aligned reads,
++ /// aligned to either 16x8 or u8x16.
++ /// dst must be valid for 2*SIMD_STRIDE_SIZE bytes of aligned or
unaligned reads
+ #[inline(always)]
+ pub unsafe fn $name(src: *const u8, dst: *mut u16) -> Option<usize>
{
+ let first = load16_aligned(src);
+ let second = load16_aligned(src.add(SIMD_STRIDE_SIZE));
+ let (a, b) = simd_unpack(first);
+ $store(dst, a);
++ // Safety: divide by 2 since it's a u16 pointer
+ $store(dst.add(SIMD_STRIDE_SIZE / 2), b);
+ if unlikely(!simd_is_ascii(first | second)) {
+ let mask_first = mask_ascii(first);
+ if mask_first != 0 {
+ return Some(mask_first.trailing_zeros() as usize);
+ }
+ let (c, d) = simd_unpack(second);
+ $store(dst.add(SIMD_STRIDE_SIZE), c);
+ $store(dst.add(SIMD_STRIDE_SIZE + (SIMD_STRIDE_SIZE / 2)),
d);
+ let mask_second = mask_ascii(second);
+ return Some(SIMD_STRIDE_SIZE + mask_second.trailing_zeros()
as usize);
+ }
+ let (c, d) = simd_unpack(second);
+ $store(dst.add(SIMD_STRIDE_SIZE), c);
+ $store(dst.add(SIMD_STRIDE_SIZE + (SIMD_STRIDE_SIZE / 2)), d);
+ None
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! unpack_simd_stride {
++ // Safety: load/store must be valid for 16 bytes of read/write, which
may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)`
functions)
+ ($name:ident, $load:ident, $store:ident) => {
++ /// Safety: src and dst must be valid for 16 bytes of read/write
according to
++ /// the $load/$store fn, which may allow for unaligned reads/writes
or require
++ /// alignment to either 16x8 or u8x16.
+ #[inline(always)]
+ pub unsafe fn $name(src: *const u8, dst: *mut u16) {
+ let simd = $load(src);
+ let (first, second) = simd_unpack(simd);
+ $store(dst, first);
+ $store(dst.add(8), second);
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! basic_latin_to_ascii_simd_stride {
++ // Safety: load/store must be valid for 16 bytes of read/write, which
may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)`
functions)
+ ($name:ident, $load:ident, $store:ident) => {
++ /// Safety: src and dst must be valid for 32/16 bytes of read/write
according to
++ /// the $load/$store fn, which may allow for unaligned reads/writes
or require
++ /// alignment to either 16x8 or u8x16.
+ #[inline(always)]
+ pub unsafe fn $name(src: *const u16, dst: *mut u8) -> bool {
+ let first = $load(src);
+ let second = $load(src.add(8));
+ if simd_is_basic_latin(first | second) {
+ $store(dst, simd_pack(first, second));
+ true
+ } else {
+ false
+ }
+ }
+ };
+ }
+
+ #[allow(unused_macros)]
+ macro_rules! pack_simd_stride {
++ // Safety: load/store must be valid for 16 bytes of read/write, which
may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)`
functions)
+ ($name:ident, $load:ident, $store:ident) => {
++ /// Safety: src and dst must be valid for 32/16 bytes of read/write
according to
++ /// the $load/$store fn, which may allow for unaligned reads/writes
or require
++ /// alignment to either 16x8 or u8x16.
+ #[inline(always)]
+ pub unsafe fn $name(src: *const u16, dst: *mut u8) {
+ let first = $load(src);
+ let second = $load(src.add(8));
+ $store(dst, simd_pack(first, second));
+ }
+ };
+ }
+
+ cfg_if! {
+ if #[cfg(all(feature = "simd-accel", target_endian = "little",
target_arch = "aarch64"))] {
+ // SIMD with the same instructions for aligned and unaligned loads
and stores
+
+ pub const SIMD_STRIDE_SIZE: usize = 16;
+
+ pub const MAX_STRIDE_SIZE: usize = 16;
+
+ // pub const ALIGNMENT: usize = 8;
+
+ pub const ALU_STRIDE_SIZE: usize = 16;
+
+ pub const ALU_ALIGNMENT: usize = 8;
+
+ pub const ALU_ALIGNMENT_MASK: usize = 7;
+
++ // Safety for stride macros: We stick to the load8_aligned/etc
family of functions. We consistently produce
++ // neither_unaligned variants using only unaligned inputs.
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_neither_aligned,
load16_unaligned, store16_unaligned);
+
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_neither_aligned,
load16_unaligned, store8_unaligned);
+ unpack_simd_stride!(unpack_stride_neither_aligned,
load16_unaligned, store8_unaligned);
+
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_neither_aligned,
load8_unaligned, store16_unaligned);
+ pack_simd_stride!(pack_stride_neither_aligned, load8_unaligned,
store16_unaligned);
+
++ // Safety for conversion macros: We use the unalign macro with
unalign functions above. All stride functions were produced
++ // by stride macros that universally munch a single
SIMD_STRIDE_SIZE worth of elements.
+ ascii_simd_unalign!(ascii_to_ascii, u8, u8,
ascii_to_ascii_stride_neither_aligned);
+ ascii_simd_unalign!(ascii_to_basic_latin, u8, u16,
ascii_to_basic_latin_stride_neither_aligned);
+ ascii_simd_unalign!(basic_latin_to_ascii, u16, u8,
basic_latin_to_ascii_stride_neither_aligned);
+ latin1_simd_unalign!(unpack_latin1, u8, u16,
unpack_stride_neither_aligned);
+ latin1_simd_unalign!(pack_latin1, u16, u8,
pack_stride_neither_aligned);
+ } else if #[cfg(all(feature = "simd-accel", target_endian = "little",
target_feature = "neon"))] {
+ // SIMD with different instructions for aligned and unaligned loads
and stores.
+ //
+ // Newer microarchitectures are not supposed to have a performance
difference between
+ // aligned and unaligned SSE2 loads and stores when the address is
actually aligned,
+ // but the benchmark results I see don't agree.
+
+ pub const SIMD_STRIDE_SIZE: usize = 16;
+
+ pub const MAX_STRIDE_SIZE: usize = 16;
+
+ pub const SIMD_ALIGNMENT_MASK: usize = 15;
+
++ // Safety for stride macros: We stick to the load8_aligned/etc
family of functions. We consistently name
++ // aligned/unaligned functions according to src/dst being
aligned/unaligned
++
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_both_aligned,
load16_aligned, store16_aligned);
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_src_aligned,
load16_aligned, store16_unaligned);
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_dst_aligned,
load16_unaligned, store16_aligned);
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_neither_aligned,
load16_unaligned, store16_unaligned);
+
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_both_aligned,
load16_aligned, store8_aligned);
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_src_aligned,
load16_aligned, store8_unaligned);
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_dst_aligned,
load16_unaligned, store8_aligned);
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_neither_aligned,
load16_unaligned, store8_unaligned);
+
+ unpack_simd_stride!(unpack_stride_both_aligned, load16_aligned,
store8_aligned);
+ unpack_simd_stride!(unpack_stride_src_aligned, load16_aligned,
store8_unaligned);
+ unpack_simd_stride!(unpack_stride_dst_aligned, load16_unaligned,
store8_aligned);
+ unpack_simd_stride!(unpack_stride_neither_aligned,
load16_unaligned, store8_unaligned);
+
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_both_aligned,
load8_aligned, store16_aligned);
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_src_aligned,
load8_aligned, store16_unaligned);
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_dst_aligned,
load8_unaligned, store16_aligned);
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_neither_aligned,
load8_unaligned, store16_unaligned);
+
+ pack_simd_stride!(pack_stride_both_aligned, load8_aligned,
store16_aligned);
+ pack_simd_stride!(pack_stride_src_aligned, load8_aligned,
store16_unaligned);
+ pack_simd_stride!(pack_stride_dst_aligned, load8_unaligned,
store16_aligned);
+ pack_simd_stride!(pack_stride_neither_aligned, load8_unaligned,
store16_unaligned);
+
++ // Safety for conversion macros: We use the correct pattern of
both/src/dst/neither here. All stride functions were produced
++ // by stride macros that universally munch a single
SIMD_STRIDE_SIZE worth of elements.
++
+ ascii_simd_check_align!(ascii_to_ascii, u8, u8,
ascii_to_ascii_stride_both_aligned, ascii_to_ascii_stride_src_aligned,
ascii_to_ascii_stride_dst_aligned, ascii_to_ascii_stride_neither_aligned);
+ ascii_simd_check_align!(ascii_to_basic_latin, u8, u16,
ascii_to_basic_latin_stride_both_aligned,
ascii_to_basic_latin_stride_src_aligned,
ascii_to_basic_latin_stride_dst_aligned,
ascii_to_basic_latin_stride_neither_aligned);
+ ascii_simd_check_align!(basic_latin_to_ascii, u16, u8,
basic_latin_to_ascii_stride_both_aligned,
basic_latin_to_ascii_stride_src_aligned,
basic_latin_to_ascii_stride_dst_aligned,
basic_latin_to_ascii_stride_neither_aligned);
+ latin1_simd_check_align!(unpack_latin1, u8, u16,
unpack_stride_both_aligned, unpack_stride_src_aligned,
unpack_stride_dst_aligned, unpack_stride_neither_aligned);
+ latin1_simd_check_align!(pack_latin1, u16, u8,
pack_stride_both_aligned, pack_stride_src_aligned, pack_stride_dst_aligned,
pack_stride_neither_aligned);
+ } else if #[cfg(all(feature = "simd-accel", target_feature = "sse2"))] {
+ // SIMD with different instructions for aligned and unaligned loads
and stores.
+ //
+ // Newer microarchitectures are not supposed to have a performance
difference between
+ // aligned and unaligned SSE2 loads and stores when the address is
actually aligned,
+ // but the benchmark results I see don't agree.
+
+ pub const SIMD_STRIDE_SIZE: usize = 16;
+
++ /// Safety-usable invariant: This should be identical to
SIMD_STRIDE_SIZE (used by ascii_simd_check_align_unrolled)
+ pub const SIMD_ALIGNMENT: usize = 16;
+
+ pub const MAX_STRIDE_SIZE: usize = 16;
+
+ pub const SIMD_ALIGNMENT_MASK: usize = 15;
+
++ // Safety for stride macros: We stick to the load8_aligned/etc
family of functions. We consistently name
++ // aligned/unaligned functions according to src/dst being
aligned/unaligned
++
+
ascii_to_ascii_simd_double_stride!(ascii_to_ascii_simd_double_stride_both_aligned,
store16_aligned);
+
ascii_to_ascii_simd_double_stride!(ascii_to_ascii_simd_double_stride_src_aligned,
store16_unaligned);
+
+
ascii_to_basic_latin_simd_double_stride!(ascii_to_basic_latin_simd_double_stride_both_aligned,
store8_aligned);
+
ascii_to_basic_latin_simd_double_stride!(ascii_to_basic_latin_simd_double_stride_src_aligned,
store8_unaligned);
+
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_both_aligned,
load16_aligned, store16_aligned);
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_src_aligned,
load16_aligned, store16_unaligned);
+ ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_neither_aligned,
load16_unaligned, store16_unaligned);
+
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_both_aligned,
load16_aligned, store8_aligned);
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_src_aligned,
load16_aligned, store8_unaligned);
+
ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_neither_aligned,
load16_unaligned, store8_unaligned);
+
+ unpack_simd_stride!(unpack_stride_both_aligned, load16_aligned,
store8_aligned);
+ unpack_simd_stride!(unpack_stride_src_aligned, load16_aligned,
store8_unaligned);
+
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_both_aligned,
load8_aligned, store16_aligned);
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_src_aligned,
load8_aligned, store16_unaligned);
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_dst_aligned,
load8_unaligned, store16_aligned);
+
basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_neither_aligned,
load8_unaligned, store16_unaligned);
+
+ pack_simd_stride!(pack_stride_both_aligned, load8_aligned,
store16_aligned);
+ pack_simd_stride!(pack_stride_src_aligned, load8_aligned,
store16_unaligned);
+
++ // Safety for conversion macros: We use the correct pattern of
both/src/dst/neither/double_both/double_src here. All stride functions were
produced
++ // by stride macros that universally munch a single
SIMD_STRIDE_SIZE worth of elements.
++
+ ascii_simd_check_align_unrolled!(ascii_to_ascii, u8, u8,
ascii_to_ascii_stride_both_aligned, ascii_to_ascii_stride_src_aligned,
ascii_to_ascii_stride_neither_aligned,
ascii_to_ascii_simd_double_stride_both_aligned,
ascii_to_ascii_simd_double_stride_src_aligned);
+ ascii_simd_check_align_unrolled!(ascii_to_basic_latin, u8, u16,
ascii_to_basic_latin_stride_both_aligned,
ascii_to_basic_latin_stride_src_aligned,
ascii_to_basic_latin_stride_neither_aligned,
ascii_to_basic_latin_simd_double_stride_both_aligned,
ascii_to_basic_latin_simd_double_stride_src_aligned);
+
+ ascii_simd_check_align!(basic_latin_to_ascii, u16, u8,
basic_latin_to_ascii_stride_both_aligned,
basic_latin_to_ascii_stride_src_aligned,
basic_latin_to_ascii_stride_dst_aligned,
basic_latin_to_ascii_stride_neither_aligned);
+ latin1_simd_check_align_unrolled!(unpack_latin1, u8, u16,
unpack_stride_both_aligned, unpack_stride_src_aligned,
unpack_stride_dst_aligned, unpack_stride_neither_aligned);
+ latin1_simd_check_align_unrolled!(pack_latin1, u16, u8,
pack_stride_both_aligned, pack_stride_src_aligned, pack_stride_dst_aligned,
pack_stride_neither_aligned);
+ } else if #[cfg(all(target_endian = "little", target_pointer_width =
"64"))] {
+ // Aligned ALU word, little-endian, 64-bit
+
++ /// Safety invariant: this is the amount of bytes consumed by
++ /// unpack_alu. This will be twice the pointer width, as it
consumes two usizes.
++ /// This is also the number of bytes produced by pack_alu.
++ /// This is also the number of u16 code units produced/consumed by
unpack_alu/pack_alu respectively.
+ pub const ALU_STRIDE_SIZE: usize = 16;
+
+ pub const MAX_STRIDE_SIZE: usize = 16;
+
++ // Safety invariant: this is the pointer width in bytes
+ pub const ALU_ALIGNMENT: usize = 8;
+
++ // Safety invariant: this is a mask for getting the bits of a
pointer not aligned to ALU_ALIGNMENT
+ pub const ALU_ALIGNMENT_MASK: usize = 7;
+
++ /// Safety: dst must point to valid space for writing four `usize`s
+ #[inline(always)]
+ unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut
usize) {
+ let first = ((0x0000_0000_FF00_0000usize & word) << 24) |
+ ((0x0000_0000_00FF_0000usize & word) << 16) |
+ ((0x0000_0000_0000_FF00usize & word) << 8) |
+ (0x0000_0000_0000_00FFusize & word);
+ let second = ((0xFF00_0000_0000_0000usize & word) >> 8) |
+ ((0x00FF_0000_0000_0000usize & word) >> 16) |
+ ((0x0000_FF00_0000_0000usize & word) >> 24) |
+ ((0x0000_00FF_0000_0000usize & word) >> 32);
+ let third = ((0x0000_0000_FF00_0000usize & second_word) << 24) |
+ ((0x0000_0000_00FF_0000usize & second_word) << 16) |
+ ((0x0000_0000_0000_FF00usize & second_word) << 8) |
+ (0x0000_0000_0000_00FFusize & second_word);
+ let fourth = ((0xFF00_0000_0000_0000usize & second_word) >> 8) |
+ ((0x00FF_0000_0000_0000usize & second_word) >> 16)
|
+ ((0x0000_FF00_0000_0000usize & second_word) >> 24)
|
+ ((0x0000_00FF_0000_0000usize & second_word) >> 32);
++ // Safety: fn invariant used here
+ *dst = first;
+ *(dst.add(1)) = second;
+ *(dst.add(2)) = third;
+ *(dst.add(3)) = fourth;
+ }
+
++ /// Safety: dst must point to valid space for writing two `usize`s
+ #[inline(always)]
+ unsafe fn pack_alu(first: usize, second: usize, third: usize,
fourth: usize, dst: *mut usize) {
+ let word = ((0x00FF_0000_0000_0000usize & second) << 8) |
+ ((0x0000_00FF_0000_0000usize & second) << 16) |
+ ((0x0000_0000_00FF_0000usize & second) << 24) |
+ ((0x0000_0000_0000_00FFusize & second) << 32) |
+ ((0x00FF_0000_0000_0000usize & first) >> 24) |
+ ((0x0000_00FF_0000_0000usize & first) >> 16) |
+ ((0x0000_0000_00FF_0000usize & first) >> 8) |
+ (0x0000_0000_0000_00FFusize & first);
+ let second_word = ((0x00FF_0000_0000_0000usize & fourth) << 8) |
+ ((0x0000_00FF_0000_0000usize & fourth) << 16)
|
+ ((0x0000_0000_00FF_0000usize & fourth) << 24)
|
+ ((0x0000_0000_0000_00FFusize & fourth) << 32)
|
+ ((0x00FF_0000_0000_0000usize & third) >> 24) |
+ ((0x0000_00FF_0000_0000usize & third) >> 16) |
+ ((0x0000_0000_00FF_0000usize & third) >> 8) |
+ (0x0000_0000_0000_00FFusize & third);
++ // Safety: fn invariant used here
+ *dst = word;
+ *(dst.add(1)) = second_word;
+ }
+ } else if #[cfg(all(target_endian = "little", target_pointer_width =
"32"))] {
+ // Aligned ALU word, little-endian, 32-bit
+
++ /// Safety invariant: this is the amount of bytes consumed by
++ /// unpack_alu. This will be twice the pointer width, as it
consumes two usizes.
++ /// This is also the number of bytes produced by pack_alu.
++ /// This is also the number of u16 code units produced/consumed by
unpack_alu/pack_alu respectively.
+ pub const ALU_STRIDE_SIZE: usize = 8;
+
+ pub const MAX_STRIDE_SIZE: usize = 8;
+
++ // Safety invariant: this is the pointer width in bytes
+ pub const ALU_ALIGNMENT: usize = 4;
+
++ // Safety invariant: this is a mask for getting the bits of a
pointer not aligned to ALU_ALIGNMENT
+ pub const ALU_ALIGNMENT_MASK: usize = 3;
+
++ /// Safety: dst must point to valid space for writing four `usize`s
+ #[inline(always)]
+ unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut
usize) {
+ let first = ((0x0000_FF00usize & word) << 8) |
+ (0x0000_00FFusize & word);
+ let second = ((0xFF00_0000usize & word) >> 8) |
+ ((0x00FF_0000usize & word) >> 16);
+ let third = ((0x0000_FF00usize & second_word) << 8) |
+ (0x0000_00FFusize & second_word);
+ let fourth = ((0xFF00_0000usize & second_word) >> 8) |
+ ((0x00FF_0000usize & second_word) >> 16);
++ // Safety: fn invariant used here
+ *dst = first;
+ *(dst.add(1)) = second;
+ *(dst.add(2)) = third;
+ *(dst.add(3)) = fourth;
+ }
+
++ /// Safety: dst must point to valid space for writing two `usize`s
+ #[inline(always)]
+ unsafe fn pack_alu(first: usize, second: usize, third: usize,
fourth: usize, dst: *mut usize) {
+ let word = ((0x00FF_0000usize & second) << 8) |
+ ((0x0000_00FFusize & second) << 16) |
+ ((0x00FF_0000usize & first) >> 8) |
+ (0x0000_00FFusize & first);
+ let second_word = ((0x00FF_0000usize & fourth) << 8) |
+ ((0x0000_00FFusize & fourth) << 16) |
+ ((0x00FF_0000usize & third) >> 8) |
+ (0x0000_00FFusize & third);
++ // Safety: fn invariant used here
+ *dst = word;
+ *(dst.add(1)) = second_word;
+ }
+ } else if #[cfg(all(target_endian = "big", target_pointer_width =
"64"))] {
+ // Aligned ALU word, big-endian, 64-bit
+
++ /// Safety invariant: this is the amount of bytes consumed by
++ /// unpack_alu. This will be twice the pointer width, as it
consumes two usizes.
++ /// This is also the number of bytes produced by pack_alu.
++ /// This is also the number of u16 code units produced/consumed by
unpack_alu/pack_alu respectively.
+ pub const ALU_STRIDE_SIZE: usize = 16;
+
+ pub const MAX_STRIDE_SIZE: usize = 16;
+
++ // Safety invariant: this is the pointer width in bytes
+ pub const ALU_ALIGNMENT: usize = 8;
+
++ // Safety invariant: this is a mask for getting the bits of a
pointer not aligned to ALU_ALIGNMENT
+ pub const ALU_ALIGNMENT_MASK: usize = 7;
+
++ /// Safety: dst must point to valid space for writing four `usize`s
+ #[inline(always)]
+ unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut
usize) {
+ let first = ((0xFF00_0000_0000_0000usize & word) >> 8) |
+ ((0x00FF_0000_0000_0000usize & word) >> 16) |
+ ((0x0000_FF00_0000_0000usize & word) >> 24) |
+ ((0x0000_00FF_0000_0000usize & word) >> 32);
+ let second = ((0x0000_0000_FF00_0000usize & word) << 24) |
+ ((0x0000_0000_00FF_0000usize & word) << 16) |
+ ((0x0000_0000_0000_FF00usize & word) << 8) |
+ (0x0000_0000_0000_00FFusize & word);
+ let third = ((0xFF00_0000_0000_0000usize & second_word) >> 8) |
+ ((0x00FF_0000_0000_0000usize & second_word) >> 16)
|
+ ((0x0000_FF00_0000_0000usize & second_word) >> 24)
|
+ ((0x0000_00FF_0000_0000usize & second_word) >> 32);
+ let fourth = ((0x0000_0000_FF00_0000usize & second_word) << 24)
|
+ ((0x0000_0000_00FF_0000usize & second_word) << 16) |
+ ((0x0000_0000_0000_FF00usize & second_word) << 8) |
+ (0x0000_0000_0000_00FFusize & second_word);
++ // Safety: fn invariant used here
+ *dst = first;
+ *(dst.add(1)) = second;
+ *(dst.add(2)) = third;
+ *(dst.add(3)) = fourth;
+ }
+
++ /// Safety: dst must point to valid space for writing two `usize`s
+ #[inline(always)]
+ unsafe fn pack_alu(first: usize, second: usize, third: usize,
fourth: usize, dst: *mut usize) {
+ let word = ((0x00FF0000_00000000usize & first) << 8) |
+ ((0x000000FF_00000000usize & first) << 16) |
+ ((0x00000000_00FF0000usize & first) << 24) |
+ ((0x00000000_000000FFusize & first) << 32) |
+ ((0x00FF0000_00000000usize & second) >> 24) |
+ ((0x000000FF_00000000usize & second) >> 16) |
+ ((0x00000000_00FF0000usize & second) >> 8) |
+ (0x00000000_000000FFusize & second);
+ let second_word = ((0x00FF0000_00000000usize & third) << 8) |
+ ((0x000000FF_00000000usize & third) << 16) |
+ ((0x00000000_00FF0000usize & third) << 24) |
+ ((0x00000000_000000FFusize & third) << 32) |
+ ((0x00FF0000_00000000usize & fourth) >> 24) |
+ ((0x000000FF_00000000usize & fourth) >> 16) |
+ ((0x00000000_00FF0000usize & fourth) >> 8) |
+ (0x00000000_000000FFusize & fourth);
++ // Safety: fn invariant used here
+ *dst = word;
+ *(dst.add(1)) = second_word;
+ }
+ } else if #[cfg(all(target_endian = "big", target_pointer_width =
"32"))] {
+ // Aligned ALU word, big-endian, 32-bit
+
++ /// Safety invariant: this is the amount of bytes consumed by
++ /// unpack_alu. This will be twice the pointer width, as it
consumes two usizes.
++ /// This is also the number of bytes produced by pack_alu.
++ /// This is also the number of u16 code units produced/consumed by
unpack_alu/pack_alu respectively.
+ pub const ALU_STRIDE_SIZE: usize = 8;
+
+ pub const MAX_STRIDE_SIZE: usize = 8;
+
++ // Safety invariant: this is the pointer width in bytes
+ pub const ALU_ALIGNMENT: usize = 4;
+
++ // Safety invariant: this is a mask for getting the bits of a
pointer not aligned to ALU_ALIGNMENT
+ pub const ALU_ALIGNMENT_MASK: usize = 3;
+
++ /// Safety: dst must point to valid space for writing four `usize`s
+ #[inline(always)]
+ unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut
usize) {
+ let first = ((0xFF00_0000usize & word) >> 8) |
+ ((0x00FF_0000usize & word) >> 16);
+ let second = ((0x0000_FF00usize & word) << 8) |
+ (0x0000_00FFusize & word);
+ let third = ((0xFF00_0000usize & second_word) >> 8) |
+ ((0x00FF_0000usize & second_word) >> 16);
+ let fourth = ((0x0000_FF00usize & second_word) << 8) |
+ (0x0000_00FFusize & second_word);
++ // Safety: fn invariant used here
+ *dst = first;
+ *(dst.add(1)) = second;
+ *(dst.add(2)) = third;
+ *(dst.add(3)) = fourth;
+ }
+
++ /// Safety: dst must point to valid space for writing two `usize`s
+ #[inline(always)]
+ unsafe fn pack_alu(first: usize, second: usize, third: usize,
fourth: usize, dst: *mut usize) {
+ let word = ((0x00FF_0000usize & first) << 8) |
+ ((0x0000_00FFusize & first) << 16) |
+ ((0x00FF_0000usize & second) >> 8) |
+ (0x0000_00FFusize & second);
+ let second_word = ((0x00FF_0000usize & third) << 8) |
+ ((0x0000_00FFusize & third) << 16) |
+ ((0x00FF_0000usize & fourth) >> 8) |
+ (0x0000_00FFusize & fourth);
++ // Safety: fn invariant used here
+ *dst = word;
+ *(dst.add(1)) = second_word;
+ }
+ } else {
+ ascii_naive!(ascii_to_ascii, u8, u8);
+ ascii_naive!(ascii_to_basic_latin, u8, u16);
+ ascii_naive!(basic_latin_to_ascii, u16, u8);
+ }
+ }
+
+ cfg_if! {
++ // Safety-usable invariant: this counts the zeroes from the "first
byte" of utf-8 data packed into a usize
++ // with the target endianness
+ if #[cfg(target_endian = "little")] {
+ #[allow(dead_code)]
+ #[inline(always)]
+ fn count_zeros(word: usize) -> u32 {
+ word.trailing_zeros()
+ }
+ } else {
+ #[allow(dead_code)]
+ #[inline(always)]
+ fn count_zeros(word: usize) -> u32 {
+ word.leading_zeros()
+ }
+ }
+ }
+
+ cfg_if! {
+ if #[cfg(all(feature = "simd-accel", target_endian = "little",
target_arch = "disabled"))] {
++ /// Safety-usable invariant: Will return the value and position of
the first non-ASCII byte in the slice in a Some if found.
++ /// In other words, the first element of the Some is always `> 127`
+ #[inline(always)]
+ pub fn validate_ascii(slice: &[u8]) -> Option<(u8, usize)> {
+ let src = slice.as_ptr();
+ let len = slice.len();
+ let mut offset = 0usize;
++ // Safety: if this check succeeds we're valid for
reading/writing at least `stride` elements.
+ if SIMD_STRIDE_SIZE <= len {
+ let len_minus_stride = len - SIMD_STRIDE_SIZE;
+ loop {
++ // Safety: src at offset is valid for a
`SIMD_STRIDE_SIZE` read
+ let simd = unsafe { load16_unaligned(src.add(offset)) };
+ if !simd_is_ascii(simd) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // This is `offset > len - SIMD_STRIDE_SIZE` which
means we always have at least `SIMD_STRIDE_SIZE` elements to munch next time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ while offset < len {
+ let code_unit = slice[offset];
+ if code_unit > 127 {
++ // Safety: Safety-usable invariant upheld here
+ return Some((code_unit, offset));
+ }
+ offset += 1;
+ }
+ None
+ }
+ } else if #[cfg(all(feature = "simd-accel", target_feature = "sse2"))] {
++ /// Safety-usable invariant: will return Some() when it encounters
non-ASCII, with the first element in the Some being
++ /// guaranteed to be non-ASCII (> 127), and the second being the
offset where it is found
+ #[inline(always)]
+ pub fn validate_ascii(slice: &[u8]) -> Option<(u8, usize)> {
+ let src = slice.as_ptr();
+ let len = slice.len();
+ let mut offset = 0usize;
++ // Safety: if this check succeeds we're valid for reading at
least `stride` elements.
+ if SIMD_STRIDE_SIZE <= len {
+ // First, process one unaligned vector
++ // Safety: src is valid for a `SIMD_STRIDE_SIZE` read
+ let simd = unsafe { load16_unaligned(src) };
+ let mask = mask_ascii(simd);
+ if mask != 0 {
+ offset = mask.trailing_zeros() as usize;
+ let non_ascii = unsafe { *src.add(offset) };
+ return Some((non_ascii, offset));
+ }
+ offset = SIMD_STRIDE_SIZE;
++ // Safety: Now that offset has changed we don't yet know
how much it is valid for
+
+ // We have now seen 16 ASCII bytes. Let's guess that
+ // there will be enough more to justify more expense
+ // in the case of non-ASCII.
+ // Use aligned reads for the sake of old microachitectures.
++ // Safety: this correctly calculates the number of
src_units that need to be read before the remaining list is aligned.
++ // This is by definition less than SIMD_ALIGNMENT, which is
defined to be equal to SIMD_STRIDE_SIZE.
+ let until_alignment = unsafe { (SIMD_ALIGNMENT -
((src.add(offset) as usize) & SIMD_ALIGNMENT_MASK)) & SIMD_ALIGNMENT_MASK };
+ // This addition won't overflow, because even in the 32-bit
PAE case the
+ // address space holds enough code that the slice length
can't be that
+ // close to address space size.
+ // offset now equals SIMD_STRIDE_SIZE, hence times 3 below.
++ //
++ // Safety: if this check succeeds we're valid for reading
at least `2 * SIMD_STRIDE_SIZE` elements plus `until_alignment`.
++ // The extra SIMD_STRIDE_SIZE in the condition is because
`offset` is already `SIMD_STRIDE_SIZE`.
+ if until_alignment + (SIMD_STRIDE_SIZE * 3) <= len {
+ if until_alignment != 0 {
++ // Safety: this is safe to call since we're valid
for this read (and more), and don't care about alignment
++ // This will copy over bytes that get decoded twice
since it's not incrementing `offset` by SIMD_STRIDE_SIZE. This is fine.
+ let simd = unsafe {
load16_unaligned(src.add(offset)) };
+ let mask = mask_ascii(simd);
+ if mask != 0 {
+ offset += mask.trailing_zeros() as usize;
+ let non_ascii = unsafe { *src.add(offset) };
+ return Some((non_ascii, offset));
+ }
+ offset += until_alignment;
+ }
++ // Safety: At this point we're valid for reading
2*SIMD_STRIDE_SIZE elements
++ // Safety: Now `offset` is aligned for `src`
+ let len_minus_stride_times_two = len -
(SIMD_STRIDE_SIZE * 2);
+ loop {
++ // Safety: We were valid for this read, and were
aligned.
+ let first = unsafe {
load16_aligned(src.add(offset)) };
+ let second = unsafe { load16_aligned(src.add(offset
+ SIMD_STRIDE_SIZE)) };
+ if !simd_is_ascii(first | second) {
++ // Safety: mask_ascii produces a mask of all
the high bits.
+ let mask_first = mask_ascii(first);
+ if mask_first != 0 {
++ // Safety: on little endian systems this
will be the number of ascii bytes
++ // before the first non-ascii, i.e. valid
for indexing src
++ // TODO SAFETY: What about big-endian
systems?
+ offset += mask_first.trailing_zeros() as
usize;
+ } else {
+ let mask_second = mask_ascii(second);
++ // Safety: on little endian systems this
will be the number of ascii bytes
++ // before the first non-ascii, i.e. valid
for indexing src
+ offset += SIMD_STRIDE_SIZE +
mask_second.trailing_zeros() as usize;
+ }
++ // Safety: We know this is non-ASCII, and can
uphold the safety-usable invariant here
+ let non_ascii = unsafe { *src.add(offset) };
++
+ return Some((non_ascii, offset));
+ }
+ offset += SIMD_STRIDE_SIZE * 2;
++ // Safety: This is `offset > len - 2 *
SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE`
elements to munch next time.
+ if offset > len_minus_stride_times_two {
+ break;
+ }
+ }
++ // Safety: if this check succeeds we're valid for
reading at least `SIMD_STRIDE_SIZE`
+ if offset + SIMD_STRIDE_SIZE <= len {
+- let simd = unsafe {
load16_aligned(src.add(offset)) };
+- let mask = mask_ascii(simd);
++ // Safety: We were valid for this read, and were
aligned.
++ let simd = unsafe { load16_aligned(src.add(offset))
};
++ // Safety: mask_ascii produces a mask of all the
high bits.
++ let mask = mask_ascii(simd);
+ if mask != 0 {
++ // Safety: on little endian systems this will
be the number of ascii bytes
++ // before the first non-ascii, i.e. valid for
indexing src
+ offset += mask.trailing_zeros() as usize;
+ let non_ascii = unsafe { *src.add(offset) };
++ // Safety: We know this is non-ASCII, and can
uphold the safety-usable invariant here
+ return Some((non_ascii, offset));
+ }
+ offset += SIMD_STRIDE_SIZE;
+ }
+ } else {
++ // Safety: this is the unaligned branch
+ // At most two iterations, so unroll
++ // Safety: if this check succeeds we're valid for
reading at least `SIMD_STRIDE_SIZE`
+ if offset + SIMD_STRIDE_SIZE <= len {
++ // Safety: We're valid for this read but must use
an unaligned read
+ let simd = unsafe {
load16_unaligned(src.add(offset)) };
+ let mask = mask_ascii(simd);
+ if mask != 0 {
+ offset += mask.trailing_zeros() as usize;
+ let non_ascii = unsafe { *src.add(offset) };
++ // Safety-usable invariant upheld here (same as
above)
+ return Some((non_ascii, offset));
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: if this check succeeds we're valid for
reading at least `SIMD_STRIDE_SIZE`
+ if offset + SIMD_STRIDE_SIZE <= len {
++ // Safety: We're valid for this read but must
use an unaligned read
+ let simd = unsafe {
load16_unaligned(src.add(offset)) };
+ let mask = mask_ascii(simd);
+ if mask != 0 {
+ offset += mask.trailing_zeros() as usize;
+ let non_ascii = unsafe { *src.add(offset) };
++ // Safety-usable invariant upheld here
(same as above)
+ return Some((non_ascii, offset));
+ }
+ offset += SIMD_STRIDE_SIZE;
+ }
+ }
+ }
+ }
+ while offset < len {
++ // Safety: relies straightforwardly on the `len` invariant
+ let code_unit = unsafe { *(src.add(offset)) };
+ if code_unit > 127 {
++ // Safety-usable invariant upheld here
+ return Some((code_unit, offset));
+ }
+ offset += 1;
+ }
+ None
+ }
+ } else {
++ // Safety-usable invariant: returns byte index of first non-ascii
byte
+ #[inline(always)]
+ fn find_non_ascii(word: usize, second_word: usize) -> Option<usize>
{
+ let word_masked = word & ASCII_MASK;
+ let second_masked = second_word & ASCII_MASK;
+ if (word_masked | second_masked) == 0 {
++ // Both are ascii, invariant upheld
+ return None;
+ }
+ if word_masked != 0 {
+ let zeros = count_zeros(word_masked);
+- // `zeros` now contains 7 (for the seven bits of non-ASCII)
++ // `zeros` now contains 0 to 7 (for the seven bits of
masked ASCII in little endian,
++ // or up to 7 bits of non-ASCII in big endian if the first
byte is non-ASCII)
+ // plus 8 times the number of ASCII in text order before the
+ // non-ASCII byte in the little-endian case or 8 times the
number of ASCII in
+ // text order before the non-ASCII byte in the big-endian
case.
+ let num_ascii = (zeros >> 3) as usize;
++ // Safety-usable invariant upheld here
+ return Some(num_ascii);
+ }
+ let zeros = count_zeros(second_masked);
+- // `zeros` now contains 7 (for the seven bits of non-ASCII)
++ // `zeros` now contains 0 to 7 (for the seven bits of masked
ASCII in little endian,
++ // or up to 7 bits of non-ASCII in big endian if the first byte
is non-ASCII)
+ // plus 8 times the number of ASCII in text order before the
+ // non-ASCII byte in the little-endian case or 8 times the
number of ASCII in
+ // text order before the non-ASCII byte in the big-endian case.
+ let num_ascii = (zeros >> 3) as usize;
++ // Safety-usable invariant upheld here
+ Some(ALU_ALIGNMENT + num_ascii)
+ }
+
++ /// Safety: `src` must be valid for the reads of two `usize`s
++ ///
++ /// Safety-usable invariant: will return byte index of first
non-ascii byte
+ #[inline(always)]
+ unsafe fn validate_ascii_stride(src: *const usize) -> Option<usize>
{
+ let word = *src;
+ let second_word = *(src.add(1));
+ find_non_ascii(word, second_word)
+ }
+
++ /// Safety-usable invariant: will return Some() when it encounters
non-ASCII, with the first element in the Some being
++ /// guaranteed to be non-ASCII (> 127), and the second being the
offset where it is found
+ #[cfg_attr(feature = "cargo-clippy", allow(cast_ptr_alignment))]
+ #[inline(always)]
+ pub fn validate_ascii(slice: &[u8]) -> Option<(u8, usize)> {
+ let src = slice.as_ptr();
+ let len = slice.len();
+ let mut offset = 0usize;
+ let mut until_alignment = (ALU_ALIGNMENT - ((src as usize) &
ALU_ALIGNMENT_MASK)) & ALU_ALIGNMENT_MASK;
++ // Safety: If this check fails we're valid to read
`until_alignment + ALU_STRIDE_SIZE` elements
+ if until_alignment + ALU_STRIDE_SIZE <= len {
+ while until_alignment != 0 {
+ let code_unit = slice[offset];
+ if code_unit > 127 {
++ // Safety-usable invairant upheld here
+ return Some((code_unit, offset));
+ }
+ offset += 1;
+ until_alignment -= 1;
+ }
++ // Safety: At this point we have read until_alignment
elements and
++ // are valid for `ALU_STRIDE_SIZE` more.
+ let len_minus_stride = len - ALU_STRIDE_SIZE;
+ loop {
++ // Safety: we were valid for this read
+ let ptr = unsafe { src.add(offset) as *const usize };
+ if let Some(num_ascii) = unsafe {
validate_ascii_stride(ptr) } {
+ offset += num_ascii;
++ // Safety-usable invairant upheld here using the
invariant from validate_ascii_stride()
+ return Some((unsafe { *(src.add(offset)) },
offset));
+ }
+ offset += ALU_STRIDE_SIZE;
++ // Safety: This is `offset > ALU_STRIDE_SIZE` which
means we always have at least `2 * ALU_STRIDE_SIZE` elements to munch next
time.
+ if offset > len_minus_stride {
+ break;
+ }
+ }
+ }
+ while offset < len {
+ let code_unit = slice[offset];
+ if code_unit > 127 {
++ // Safety-usable invairant upheld here
+ return Some((code_unit, offset));
+ }
+ offset += 1;
+ }
+ None
+ }
+
+ }
+ }
+
+ cfg_if! {
+ if #[cfg(all(feature = "simd-accel", any(target_feature = "sse2",
all(target_endian = "little", target_arch = "aarch64"))))] {
+
+ } else if #[cfg(all(feature = "simd-accel", target_endian = "little",
target_feature = "neon"))] {
+ // Even with NEON enabled, we use the ALU path for ASCII
validation, because testing
+ // on Exynos 5 indicated that using NEON isn't worthwhile where
there are only
+ // vector reads without vector writes.
+
+ pub const ALU_STRIDE_SIZE: usize = 8;
+
+ pub const ALU_ALIGNMENT: usize = 4;
+
+ pub const ALU_ALIGNMENT_MASK: usize = 3;
+ } else {
++ // Safety: src points to two valid `usize`s, dst points to four
valid `usize`s
+ #[inline(always)]
+ unsafe fn unpack_latin1_stride_alu(src: *const usize, dst: *mut
usize) {
++ // Safety: src safety invariant used here
+ let word = *src;
+ let second_word = *(src.add(1));
++ // Safety: dst safety invariant passed down
+ unpack_alu(word, second_word, dst);
+ }
+
++ // Safety: src points to four valid `usize`s, dst points to two
valid `usize`s
+ #[inline(always)]
+ unsafe fn pack_latin1_stride_alu(src: *const usize, dst: *mut
usize) {
++ // Safety: src safety invariant used here
+ let first = *src;
+ let second = *(src.add(1));
+ let third = *(src.add(2));
+ let fourth = *(src.add(3));
++ // Safety: dst safety invariant passed down
+ pack_alu(first, second, third, fourth, dst);
+ }
+
++ // Safety: src points to two valid `usize`s, dst points to four
valid `usize`s
+ #[inline(always)]
+ unsafe fn ascii_to_basic_latin_stride_alu(src: *const usize, dst:
*mut usize) -> bool {
++ // Safety: src safety invariant used here
+ let word = *src;
+ let second_word = *(src.add(1));
+ // Check if the words contains non-ASCII
+ if (word & ASCII_MASK) | (second_word & ASCII_MASK) != 0 {
+ return false;
+ }
++ // Safety: dst safety invariant passed down
+ unpack_alu(word, second_word, dst);
+ true
+ }
+
++ // Safety: src points four valid `usize`s, dst points to two valid
`usize`s
+ #[inline(always)]
+ unsafe fn basic_latin_to_ascii_stride_alu(src: *const usize, dst:
*mut usize) -> bool {
++ // Safety: src safety invariant used here
+ let first = *src;
+ let second = *(src.add(1));
+ let third = *(src.add(2));
+ let fourth = *(src.add(3));
+ if (first & BASIC_LATIN_MASK) | (second & BASIC_LATIN_MASK) |
(third & BASIC_LATIN_MASK) | (fourth & BASIC_LATIN_MASK) != 0 {
+ return false;
+ }
++ // Safety: dst safety invariant passed down
+ pack_alu(first, second, third, fourth, dst);
+ true
+ }
+
++ // Safety: src, dst both point to two valid `usize`s each
++ // Safety-usable invariant: Will return byte index of first
non-ascii byte.
+ #[inline(always)]
+ unsafe fn ascii_to_ascii_stride(src: *const usize, dst: *mut usize)
-> Option<usize> {
++ // Safety: src safety invariant used here
+ let word = *src;
+ let second_word = *(src.add(1));
++ // Safety: src safety invariant used here
+ *dst = word;
+ *(dst.add(1)) = second_word;
++ // Relies on safety-usable invariant here
+ find_non_ascii(word, second_word)
+ }
+
+ basic_latin_alu!(ascii_to_basic_latin, u8, u16,
ascii_to_basic_latin_stride_alu);
+ basic_latin_alu!(basic_latin_to_ascii, u16, u8,
basic_latin_to_ascii_stride_alu);
+ latin1_alu!(unpack_latin1, u8, u16, unpack_latin1_stride_alu);
+ latin1_alu!(pack_latin1, u16, u8, pack_latin1_stride_alu);
++ // Safety invariant upheld: ascii_to_ascii_stride will return byte
index of first non-ascii if found
+ ascii_alu!(ascii_to_ascii, u8, u8, ascii_to_ascii_stride);
+ }
+ }
+diff --git a/third_party/rust/encoding_rs/src/handles.rs
b/third_party/rust/encoding_rs/src/handles.rs
+index b5404c01d9bd..f44a834672e9 100644
+--- a/third_party/rust/encoding_rs/src/handles.rs
++++ b/third_party/rust/encoding_rs/src/handles.rs
+@@ -34,7 +34,7 @@ use crate::simd_funcs::*;
+ all(target_endian = "little", target_feature = "neon")
+ )
+ ))]
+-use packed_simd::u16x8;
++use core::simd::u16x8;
+
+ use super::DecoderResult;
+ use super::EncoderResult;
+@@ -90,74 +90,90 @@ impl Endian for LittleEndian {
+
+ #[derive(Debug, Copy, Clone)]
+ struct UnalignedU16Slice {
++ // Safety invariant: ptr must be valid for reading 2*len bytes
+ ptr: *const u8,
+ len: usize,
+ }
+
+ impl UnalignedU16Slice {
++ /// Safety: ptr must be valid for reading 2*len bytes
+ #[inline(always)]
+ pub unsafe fn new(ptr: *const u8, len: usize) -> UnalignedU16Slice {
++ // Safety: field invariant passed up to caller here
+ UnalignedU16Slice { ptr, len }
+ }
+
+ #[inline(always)]
+ pub fn trim_last(&mut self) {
+ assert!(self.len > 0);
++ // Safety: invariant upheld here: a slice is still valid with a
shorter len
+ self.len -= 1;
+ }
+
+ #[inline(always)]
+ pub fn at(&self, i: usize) -> u16 {
+ use core::mem::MaybeUninit;
+
+ assert!(i < self.len);
+ unsafe {
+ let mut u: MaybeUninit<u16> = MaybeUninit::uninit();
++ // Safety: i is at most len - 1, which works here
+ ::core::ptr::copy_nonoverlapping(self.ptr.add(i * 2),
u.as_mut_ptr() as *mut u8, 2);
++ // Safety: valid read above lets us do this
+ u.assume_init()
+ }
+ }
+
+ #[cfg(feature = "simd-accel")]
+ #[inline(always)]
+ pub fn simd_at(&self, i: usize) -> u16x8 {
++ // Safety: i/len are on the scale of u16s, each one corresponds to
2 u8s
+ assert!(i + SIMD_STRIDE_SIZE / 2 <= self.len);
+ let byte_index = i * 2;
++ // Safety: load16_unaligned needs SIMD_STRIDE_SIZE=16 u8 elements
to read,
++ // or 16/2 = 8 u16 elements to read.
++ // We have checked that we have at least that many above.
++
+ unsafe { to_u16_lanes(load16_unaligned(self.ptr.add(byte_index))) }
+ }
+
+ #[inline(always)]
+ pub fn len(&self) -> usize {
+ self.len
+ }
+
+ #[inline(always)]
+ pub fn tail(&self, from: usize) -> UnalignedU16Slice {
+ // XXX the return value should be restricted not to
+ // outlive self.
+ assert!(from <= self.len);
++ // Safety: This upholds the same invariant: `from` is in bounds and
we're returning a shorter slice
+ unsafe { UnalignedU16Slice::new(self.ptr.add(from * 2), self.len -
from) }
+ }
+
+ #[cfg(feature = "simd-accel")]
+ #[inline(always)]
+ pub fn copy_bmp_to<E: Endian>(&self, other: &mut [u16]) -> Option<(u16,
usize)> {
+ assert!(self.len <= other.len());
+ let mut offset = 0;
++ // Safety: SIMD_STRIDE_SIZE is measured in bytes, whereas len is in
u16s. We check we can
++ // munch SIMD_STRIDE_SIZE / 2 u16s which means we can write
SIMD_STRIDE_SIZE u8s
+ if SIMD_STRIDE_SIZE / 2 <= self.len {
+ let len_minus_stride = self.len - SIMD_STRIDE_SIZE / 2;
+ loop {
+ let mut simd = self.simd_at(offset);
+ if E::OPPOSITE_ENDIAN {
+ simd = simd_byte_swap(simd);
+ }
++ // Safety: we have enough space on the other side to write
this
+ unsafe {
+ store8_unaligned(other.as_mut_ptr().add(offset), simd);
+ }
+ if contains_surrogates(simd) {
+ break;
+ }
+ offset += SIMD_STRIDE_SIZE / 2;
++ // Safety: This ensures we still have space for writing
SIMD_STRIDE_SIZE u8s
+ if offset > len_minus_stride {
+ break;
+ }
+@@ -236,23 +252,27 @@ fn copy_unaligned_basic_latin_to_ascii<E: Endian>(
+ ) -> CopyAsciiResult<usize, (u16, usize)> {
+ let len = ::core::cmp::min(src.len(), dst.len());
+ let mut offset = 0;
++ // Safety: This check ensures we are able to read/write at least
SIMD_STRIDE_SIZE elements
+ if SIMD_STRIDE_SIZE <= len {
+ let len_minus_stride = len - SIMD_STRIDE_SIZE;
+ loop {
+ let mut first = src.simd_at(offset);
+ let mut second = src.simd_at(offset + (SIMD_STRIDE_SIZE / 2));
+ if E::OPPOSITE_ENDIAN {
+ first = simd_byte_swap(first);
+ second = simd_byte_swap(second);
+ }
+ if !simd_is_basic_latin(first | second) {
+ break;
+ }
+ let packed = simd_pack(first, second);
++ // Safety: We are able to write SIMD_STRIDE_SIZE elements in
this iteration
+ unsafe {
+ store16_unaligned(dst.as_mut_ptr().add(offset), packed);
+ }
+ offset += SIMD_STRIDE_SIZE;
++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE`, which
ensures that we can write at least SIMD_STRIDE_SIZE elements
++ // in the next iteration
+ if offset > len_minus_stride {
+ break;
+ }
+@@ -637,84 +657,96 @@ impl<'a> Utf16Destination<'a> {
+ self.write_code_unit((0xDC00 + (astral & 0x3FF)) as u16);
+ }
+ #[inline(always)]
+- pub fn write_surrogate_pair(&mut self, high: u16, low: u16) {
++ fn write_surrogate_pair(&mut self, high: u16, low: u16) {
+ self.write_code_unit(high);
+ self.write_code_unit(low);
+ }
+ #[inline(always)]
+ fn write_big5_combination(&mut self, combined: u16, combining: u16) {
+ self.write_bmp_excl_ascii(combined);
+ self.write_bmp_excl_ascii(combining);
+ }
++ // Safety-usable invariant: CopyAsciiResult::GoOn will only contain
bytes >=0x80
+ #[inline(always)]
+ pub fn copy_ascii_from_check_space_bmp<'b>(
+ &'b mut self,
+ source: &mut ByteSource,
+ ) -> CopyAsciiResult<(DecoderResult, usize, usize), (u8,
Utf16BmpHandle<'b, 'a>)> {
+ let non_ascii_ret = {
+ let src_remaining = &source.slice[source.pos..];
+ let dst_remaining = &mut self.slice[self.pos..];
+ let (pending, length) = if dst_remaining.len() <
src_remaining.len() {
+ (DecoderResult::OutputFull, dst_remaining.len())
+ } else {
+ (DecoderResult::InputEmpty, src_remaining.len())
+ };
++ // Safety: This function is documented as needing valid
pointers for src/dest and len, which
++ // is true since we've passed the minumum length of the two
+ match unsafe {
+ ascii_to_basic_latin(src_remaining.as_ptr(),
dst_remaining.as_mut_ptr(), length)
+ } {
+ None => {
+ source.pos += length;
+ self.pos += length;
+ return CopyAsciiResult::Stop((pending, source.pos,
self.pos));
+ }
++ // Safety: the function is documented as returning bytes
>=0x80 in the Some
+ Some((non_ascii, consumed)) => {
+ source.pos += consumed;
+ self.pos += consumed;
+ source.pos += 1; // +1 for non_ascii
++ // Safety: non-ascii bubbled out here
+ non_ascii
+ }
+ }
+ };
++ // Safety: non-ascii returned here
+ CopyAsciiResult::GoOn((non_ascii_ret, Utf16BmpHandle::new(self)))
+ }
++ // Safety-usable invariant: CopyAsciiResult::GoOn will only contain
bytes >=0x80
+ #[inline(always)]
+ pub fn copy_ascii_from_check_space_astral<'b>(
+ &'b mut self,
+ source: &mut ByteSource,
+ ) -> CopyAsciiResult<(DecoderResult, usize, usize), (u8,
Utf16AstralHandle<'b, 'a>)> {
+ let non_ascii_ret = {
+ let dst_len = self.slice.len();
+ let src_remaining = &source.slice[source.pos..];
+ let dst_remaining = &mut self.slice[self.pos..];
+ let (pending, length) = if dst_remaining.len() <
src_remaining.len() {
+ (DecoderResult::OutputFull, dst_remaining.len())
+ } else {
+ (DecoderResult::InputEmpty, src_remaining.len())
+ };
++ // Safety: This function is documented as needing valid
pointers for src/dest and len, which
++ // is true since we've passed the minumum length of the two
+ match unsafe {
+ ascii_to_basic_latin(src_remaining.as_ptr(),
dst_remaining.as_mut_ptr(), length)
+ } {
+ None => {
+ source.pos += length;
+ self.pos += length;
+ return CopyAsciiResult::Stop((pending, source.pos,
self.pos));
+ }
++ // Safety: the function is documented as returning bytes
>=0x80 in the Some
+ Some((non_ascii, consumed)) => {
+ source.pos += consumed;
+ self.pos += consumed;
+ if self.pos + 1 < dst_len {
+ source.pos += 1; // +1 for non_ascii
++ // Safety: non-ascii bubbled out
here
+ non_ascii
+ } else {
+ return CopyAsciiResult::Stop((
+ DecoderResult::OutputFull,
+ source.pos,
+ self.pos,
+ ));
+ }
+ }
+ }
+ };
++ // Safety: non-ascii returned here
+ CopyAsciiResult::GoOn((non_ascii_ret, Utf16AstralHandle::new(self)))
+ }
+ #[inline(always)]
+diff --git a/third_party/rust/encoding_rs/src/lib.rs
b/third_party/rust/encoding_rs/src/lib.rs
+index 6cc920ef882d..1faf02e6bdf3 100644
+--- a/third_party/rust/encoding_rs/src/lib.rs
++++ b/third_party/rust/encoding_rs/src/lib.rs
+@@ -689,27 +689,16 @@
+ //! for discussion about the UTF-16 family.
+
+ #![no_std]
+-#![cfg_attr(feature = "simd-accel", feature(core_intrinsics))]
++#![cfg_attr(feature = "simd-accel", feature(core_intrinsics,
portable_simd))]
+
+ #[cfg(feature = "alloc")]
+ #[cfg_attr(test, macro_use)]
+ extern crate alloc;
+
+ extern crate core;
+ #[macro_use]
+ extern crate cfg_if;
+
+-#[cfg(all(
+- feature = "simd-accel",
+- any(
+- target_feature = "sse2",
+- all(target_endian = "little", target_arch = "aarch64"),
+- all(target_endian = "little", target_feature = "neon")
+- )
+-))]
+-#[macro_use(shuffle)]
+-extern crate packed_simd;
+-
+ #[cfg(feature = "serde")]
+ extern crate serde;
+
+diff --git a/third_party/rust/encoding_rs/src/mem.rs
b/third_party/rust/encoding_rs/src/mem.rs
+index ba8d9e3f4ca7..0f9f3c19772a 100644
+--- a/third_party/rust/encoding_rs/src/mem.rs
++++ b/third_party/rust/encoding_rs/src/mem.rs
+@@ -116,30 +116,37 @@ macro_rules! by_unit_check_alu {
+ }
+ let len_minus_stride = len - ALU_ALIGNMENT / unit_size;
+ if offset + (4 * (ALU_ALIGNMENT / unit_size)) <= len {
++ // Safety: the above check lets us perform 4
consecutive reads of
++ // length ALU_ALIGNMENT / unit_size. ALU_ALIGNMENT
is the size of usize, and unit_size
++ // is the size of the `src` pointer, so this is
equal to performing four usize reads.
++ //
++ // This invariant is upheld on all loop iterations
+ let len_minus_unroll = len - (4 * (ALU_ALIGNMENT /
unit_size));
+ loop {
+ let unroll_accu = unsafe { *(src.add(offset) as
*const usize) }
+ | unsafe {
+ *(src.add(offset + (ALU_ALIGNMENT /
unit_size)) as *const usize)
+ }
+ | unsafe {
+ *(src.add(offset + (2 * (ALU_ALIGNMENT
/ unit_size)))
+ as *const usize)
+ }
+ | unsafe {
+ *(src.add(offset + (3 * (ALU_ALIGNMENT
/ unit_size)))
+ as *const usize)
+ };
+ if unroll_accu & $mask != 0 {
+ return false;
+ }
+ offset += 4 * (ALU_ALIGNMENT / unit_size);
++ // Safety: this check lets us continue to
perform the 4 reads earlier
+ if offset > len_minus_unroll {
+ break;
+ }
+ }
+ }
+ while offset <= len_minus_stride {
++ // Safety: the above check lets us perform one
usize read.
+ accu |= unsafe { *(src.add(offset) as *const usize)
};
+ offset += ALU_ALIGNMENT / unit_size;
+ }
+@@ -189,53 +196,60 @@ macro_rules! by_unit_check_simd {
+ }
+ let len_minus_stride = len - SIMD_STRIDE_SIZE /
unit_size;
+ if offset + (4 * (SIMD_STRIDE_SIZE / unit_size)) <= len
{
++ // Safety: the above check lets us perform 4
consecutive reads of
++ // length SIMD_STRIDE_SIZE / unit_size.
SIMD_STRIDE_SIZE is the size of $simd_ty, and unit_size
++ // is the size of the `src` pointer, so this is
equal to performing four $simd_ty reads.
++ //
++ // This invariant is upheld on all loop iterations
+ let len_minus_unroll = len - (4 * (SIMD_STRIDE_SIZE
/ unit_size));
+ loop {
+ let unroll_accu = unsafe { *(src.add(offset) as
*const $simd_ty) }
+ | unsafe {
+ *(src.add(offset + (SIMD_STRIDE_SIZE /
unit_size))
+ as *const $simd_ty)
+ }
+ | unsafe {
+ *(src.add(offset + (2 *
(SIMD_STRIDE_SIZE / unit_size)))
+ as *const $simd_ty)
+ }
+ | unsafe {
+ *(src.add(offset + (3 *
(SIMD_STRIDE_SIZE / unit_size)))
+ as *const $simd_ty)
+ };
+ if !$func(unroll_accu) {
+ return false;
+ }
+ offset += 4 * (SIMD_STRIDE_SIZE / unit_size);
++ // Safety: this check lets us continue to
perform the 4 reads earlier
+ if offset > len_minus_unroll {
+ break;
+ }
+ }
+ }
+ let mut simd_accu = $splat;
+ while offset <= len_minus_stride {
++ // Safety: the above check lets us perform one
$simd_ty read.
+ simd_accu = simd_accu | unsafe { *(src.add(offset)
as *const $simd_ty) };
+ offset += SIMD_STRIDE_SIZE / unit_size;
+ }
+ if !$func(simd_accu) {
+ return false;
+ }
+ }
+ }
+ for &unit in &buffer[offset..] {
+ accu |= unit as usize;
+ }
+ accu < $bound
+ }
+ };
+ }
+
+ cfg_if! {
+ if #[cfg(all(feature = "simd-accel", any(target_feature = "sse2",
all(target_endian = "little", target_arch = "aarch64"), all(target_endian =
"little", target_feature = "neon"))))] {
+ use crate::simd_funcs::*;
+- use packed_simd::u8x16;
+- use packed_simd::u16x8;
++ use core::simd::u8x16;
++ use core::simd::u16x8;
+
+ const SIMD_ALIGNMENT: usize = 16;
+
+diff --git a/third_party/rust/encoding_rs/src/simd_funcs.rs
b/third_party/rust/encoding_rs/src/simd_funcs.rs
+index 96feeab5a657..5ae00e62e0f7 100644
+--- a/third_party/rust/encoding_rs/src/simd_funcs.rs
++++ b/third_party/rust/encoding_rs/src/simd_funcs.rs
+@@ -7,55 +7,74 @@
+ // option. This file may not be copied, modified, or distributed
+ // except according to those terms.
+
+-use packed_simd::u16x8;
+-use packed_simd::u8x16;
+-use packed_simd::IntoBits;
++use any_all_workaround::all_mask16x8;
++use any_all_workaround::all_mask8x16;
++use any_all_workaround::any_mask16x8;
++use any_all_workaround::any_mask8x16;
++use core::simd::cmp::SimdPartialEq;
++use core::simd::cmp::SimdPartialOrd;
++use core::simd::mask16x8;
++use core::simd::mask8x16;
++use core::simd::simd_swizzle;
++use core::simd::u16x8;
++use core::simd::u8x16;
++use core::simd::ToBytes;
+
+ // TODO: Migrate unaligned access to stdlib code if/when the RFC
+ // https://github.com/rust-lang/rfcs/pull/1725 is implemented.
+
++/// Safety invariant: ptr must be valid for an unaligned read of 16 bytes
+ #[inline(always)]
+ pub unsafe fn load16_unaligned(ptr: *const u8) -> u8x16 {
+- let mut simd = ::core::mem::uninitialized();
+- ::core::ptr::copy_nonoverlapping(ptr, &mut simd as *mut u8x16 as *mut
u8, 16);
+- simd
++ let mut simd = ::core::mem::MaybeUninit::<u8x16>::uninit();
++ ::core::ptr::copy_nonoverlapping(ptr, simd.as_mut_ptr() as *mut u8, 16);
++ // Safety: copied 16 bytes of initialized memory into this, it is now
initialized
++ simd.assume_init()
+ }
+
++/// Safety invariant: ptr must be valid for an aligned-for-u8x16 read of 16
bytes
+ #[allow(dead_code)]
+ #[inline(always)]
+ pub unsafe fn load16_aligned(ptr: *const u8) -> u8x16 {
+ *(ptr as *const u8x16)
+ }
+
++/// Safety invariant: ptr must be valid for an unaligned store of 16 bytes
+ #[inline(always)]
+ pub unsafe fn store16_unaligned(ptr: *mut u8, s: u8x16) {
+ ::core::ptr::copy_nonoverlapping(&s as *const u8x16 as *const u8, ptr,
16);
+ }
+
++/// Safety invariant: ptr must be valid for an aligned-for-u8x16 store of
16 bytes
+ #[allow(dead_code)]
+ #[inline(always)]
+ pub unsafe fn store16_aligned(ptr: *mut u8, s: u8x16) {
+ *(ptr as *mut u8x16) = s;
+ }
+
++/// Safety invariant: ptr must be valid for an unaligned read of 16 bytes
+ #[inline(always)]
+ pub unsafe fn load8_unaligned(ptr: *const u16) -> u16x8 {
+- let mut simd = ::core::mem::uninitialized();
+- ::core::ptr::copy_nonoverlapping(ptr as *const u8, &mut simd as *mut
u16x8 as *mut u8, 16);
+- simd
++ let mut simd = ::core::mem::MaybeUninit::<u16x8>::uninit();
++ ::core::ptr::copy_nonoverlapping(ptr as *const u8, simd.as_mut_ptr() as
*mut u8, 16);
++ // Safety: copied 16 bytes of initialized memory into this, it is now
initialized
++ simd.assume_init()
+ }
+
++/// Safety invariant: ptr must be valid for an aligned-for-u16x8 read of 16
bytes
+ #[allow(dead_code)]
+ #[inline(always)]
+ pub unsafe fn load8_aligned(ptr: *const u16) -> u16x8 {
+ *(ptr as *const u16x8)
+ }
+
++/// Safety invariant: ptr must be valid for an unaligned store of 16 bytes
+ #[inline(always)]
+ pub unsafe fn store8_unaligned(ptr: *mut u16, s: u16x8) {
+ ::core::ptr::copy_nonoverlapping(&s as *const u16x8 as *const u8, ptr
as *mut u8, 16);
+ }
+
++/// Safety invariant: ptr must be valid for an aligned-for-u16x8 store of
16 bytes
+ #[allow(dead_code)]
+ #[inline(always)]
+ pub unsafe fn store8_aligned(ptr: *mut u16, s: u16x8) {
+@@ -100,224 +119,231 @@ pub fn simd_byte_swap(s: u16x8) -> u16x8 {
+
+ #[inline(always)]
+ pub fn to_u16_lanes(s: u8x16) -> u16x8 {
+- s.into_bits()
++ u16x8::from_ne_bytes(s)
+ }
+
+ cfg_if! {
+ if #[cfg(target_feature = "sse2")] {
+
+ // Expose low-level mask instead of higher-level conclusion,
+ // because the non-ASCII case would perform less well otherwise.
++ // Safety-usable invariant: This returned value is whether each
high bit is set
+ #[inline(always)]
+ pub fn mask_ascii(s: u8x16) -> i32 {
+ unsafe {
+- _mm_movemask_epi8(s.into_bits())
++ _mm_movemask_epi8(s.into())
+ }
+ }
+
+ } else {
+
+ }
+ }
+
+ cfg_if! {
+ if #[cfg(target_feature = "sse2")] {
+ #[inline(always)]
+ pub fn simd_is_ascii(s: u8x16) -> bool {
+ unsafe {
+- _mm_movemask_epi8(s.into_bits()) == 0
++ // Safety: We have cfg()d the correct platform
++ _mm_movemask_epi8(s.into()) == 0
+ }
+ }
+ } else if #[cfg(target_arch = "aarch64")]{
+ #[inline(always)]
+ pub fn simd_is_ascii(s: u8x16) -> bool {
+ unsafe {
+- vmaxvq_u8(s.into_bits()) < 0x80
++ // Safety: We have cfg()d the correct platform
++ vmaxvq_u8(s.into()) < 0x80
+ }
+ }
+ } else {
+ #[inline(always)]
+ pub fn simd_is_ascii(s: u8x16) -> bool {
+ // This optimizes better on ARM than
+ // the lt formulation.
+ let highest_ascii = u8x16::splat(0x7F);
+- !s.gt(highest_ascii).any()
++ !any_mask8x16(s.simd_gt(highest_ascii))
+ }
+ }
+ }
+
+ cfg_if! {
+ if #[cfg(target_feature = "sse2")] {
+ #[inline(always)]
+ pub fn simd_is_str_latin1(s: u8x16) -> bool {
+ if simd_is_ascii(s) {
+ return true;
+ }
+ let above_str_latin1 = u8x16::splat(0xC4);
+- s.lt(above_str_latin1).all()
++ s.simd_lt(above_str_latin1).all()
+ }
+ } else if #[cfg(target_arch = "aarch64")]{
+ #[inline(always)]
+ pub fn simd_is_str_latin1(s: u8x16) -> bool {
+ unsafe {
+- vmaxvq_u8(s.into_bits()) < 0xC4
++ // Safety: We have cfg()d the correct platform
++ vmaxvq_u8(s.into()) < 0xC4
+ }
+ }
+ } else {
+ #[inline(always)]
+ pub fn simd_is_str_latin1(s: u8x16) -> bool {
+ let above_str_latin1 = u8x16::splat(0xC4);
+- s.lt(above_str_latin1).all()
++ all_mask8x16(s.simd_lt(above_str_latin1))
+ }
+ }
+ }
+
+ cfg_if! {
+ if #[cfg(target_arch = "aarch64")]{
+ #[inline(always)]
+ pub fn simd_is_basic_latin(s: u16x8) -> bool {
+ unsafe {
+- vmaxvq_u16(s.into_bits()) < 0x80
++ // Safety: We have cfg()d the correct platform
++ vmaxvq_u16(s.into()) < 0x80
+ }
+ }
+
+ #[inline(always)]
+ pub fn simd_is_latin1(s: u16x8) -> bool {
+ unsafe {
+- vmaxvq_u16(s.into_bits()) < 0x100
++ // Safety: We have cfg()d the correct platform
++ vmaxvq_u16(s.into()) < 0x100
+ }
+ }
+ } else {
+ #[inline(always)]
+ pub fn simd_is_basic_latin(s: u16x8) -> bool {
+ let above_ascii = u16x8::splat(0x80);
+- s.lt(above_ascii).all()
++ all_mask16x8(s.simd_lt(above_ascii))
+ }
+
+ #[inline(always)]
+ pub fn simd_is_latin1(s: u16x8) -> bool {
+ // For some reason, on SSE2 this formulation
+ // seems faster in this case while the above
+ // function is better the other way round...
+ let highest_latin1 = u16x8::splat(0xFF);
+- !s.gt(highest_latin1).any()
++ !any_mask16x8(s.simd_gt(highest_latin1))
+ }
+ }
+ }
+
+ #[inline(always)]
+ pub fn contains_surrogates(s: u16x8) -> bool {
+ let mask = u16x8::splat(0xF800);
+ let surrogate_bits = u16x8::splat(0xD800);
+- (s & mask).eq(surrogate_bits).any()
++ any_mask16x8((s & mask).simd_eq(surrogate_bits))
+ }
+
+ cfg_if! {
+ if #[cfg(target_arch = "aarch64")]{
+ macro_rules! aarch64_return_false_if_below_hebrew {
+ ($s:ident) => ({
+ unsafe {
+- if vmaxvq_u16($s.into_bits()) < 0x0590 {
++ // Safety: We have cfg()d the correct platform
++ if vmaxvq_u16($s.into()) < 0x0590 {
+ return false;
+ }
+ }
+ })
+ }
+
+ macro_rules! non_aarch64_return_false_if_all {
+ ($s:ident) => ()
+ }
+ } else {
+ macro_rules! aarch64_return_false_if_below_hebrew {
+ ($s:ident) => ()
+ }
+
+ macro_rules! non_aarch64_return_false_if_all {
+ ($s:ident) => ({
+- if $s.all() {
++ if all_mask16x8($s) {
+ return false;
+ }
+ })
+ }
+ }
+ }
+
+ macro_rules! in_range16x8 {
+ ($s:ident, $start:expr, $end:expr) => {{
+ // SIMD sub is wrapping
+- ($s - u16x8::splat($start)).lt(u16x8::splat($end - $start))
++ ($s - u16x8::splat($start)).simd_lt(u16x8::splat($end - $start))
+ }};
+ }
+
+ #[inline(always)]
+ pub fn is_u16x8_bidi(s: u16x8) -> bool {
+ // We try to first quickly refute the RTLness of the vector. If that
+ // fails, we do the real RTL check, so in that case we end up wasting
+ // the work for the up-front quick checks. Even the quick-check is
+ // two-fold in order to return `false` ASAP if everything is below
+ // Hebrew.
+
+ aarch64_return_false_if_below_hebrew!(s);
+
+- let below_hebrew = s.lt(u16x8::splat(0x0590));
++ let below_hebrew = s.simd_lt(u16x8::splat(0x0590));
+
+ non_aarch64_return_false_if_all!(below_hebrew);
+
+- if (below_hebrew | in_range16x8!(s, 0x0900, 0x200F) | in_range16x8!(s,
0x2068, 0xD802)).all() {
++ if all_mask16x8(
++ below_hebrew | in_range16x8!(s, 0x0900, 0x200F) | in_range16x8!(s,
0x2068, 0xD802),
++ ) {
+ return false;
+ }
+
+ // Quick refutation failed. Let's do the full check.
+
+- (in_range16x8!(s, 0x0590, 0x0900)
+- | in_range16x8!(s, 0xFB1D, 0xFE00)
+- | in_range16x8!(s, 0xFE70, 0xFEFF)
+- | in_range16x8!(s, 0xD802, 0xD804)
+- | in_range16x8!(s, 0xD83A, 0xD83C)
+- | s.eq(u16x8::splat(0x200F))
+- | s.eq(u16x8::splat(0x202B))
+- | s.eq(u16x8::splat(0x202E))
+- | s.eq(u16x8::splat(0x2067)))
+- .any()
++ any_mask16x8(
++ (in_range16x8!(s, 0x0590, 0x0900)
++ | in_range16x8!(s, 0xFB1D, 0xFE00)
++ | in_range16x8!(s, 0xFE70, 0xFEFF)
++ | in_range16x8!(s, 0xD802, 0xD804)
++ | in_range16x8!(s, 0xD83A, 0xD83C)
++ | s.simd_eq(u16x8::splat(0x200F))
++ | s.simd_eq(u16x8::splat(0x202B))
++ | s.simd_eq(u16x8::splat(0x202E))
++ | s.simd_eq(u16x8::splat(0x2067))),
++ )
+ }
+
+ #[inline(always)]
+ pub fn simd_unpack(s: u8x16) -> (u16x8, u16x8) {
+- unsafe {
+- let first: u8x16 = shuffle!(
+- s,
+- u8x16::splat(0),
+- [0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23]
+- );
+- let second: u8x16 = shuffle!(
+- s,
+- u8x16::splat(0),
+- [8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31]
+- );
+- (first.into_bits(), second.into_bits())
+- }
++ let first: u8x16 = simd_swizzle!(
++ s,
++ u8x16::splat(0),
++ [0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23]
++ );
++ let second: u8x16 = simd_swizzle!(
++ s,
++ u8x16::splat(0),
++ [8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31]
++ );
++ (u16x8::from_ne_bytes(first), u16x8::from_ne_bytes(second))
+ }
+
+ cfg_if! {
+ if #[cfg(target_feature = "sse2")] {
+ #[inline(always)]
+ pub fn simd_pack(a: u16x8, b: u16x8) -> u8x16 {
+ unsafe {
+- _mm_packus_epi16(a.into_bits(), b.into_bits()).into_bits()
++ // Safety: We have cfg()d the correct platform
++ _mm_packus_epi16(a.into(), b.into()).into()
+ }
+ }
+ } else {
+ #[inline(always)]
+ pub fn simd_pack(a: u16x8, b: u16x8) -> u8x16 {
+- unsafe {
+- let first: u8x16 = a.into_bits();
+- let second: u8x16 = b.into_bits();
+- shuffle!(
+- first,
+- second,
+- [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28,
30]
+- )
+- }
++ let first: u8x16 = a.to_ne_bytes();
++ let second: u8x16 = b.to_ne_bytes();
++ simd_swizzle!(
++ first,
++ second,
++ [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30]
++ )
+ }
+ }
+ }
+diff --git a/third_party/rust/encoding_rs/src/single_byte.rs
b/third_party/rust/encoding_rs/src/single_byte.rs
+index b3b6089d318b..b7a4bf23da3a 100644
+--- a/third_party/rust/encoding_rs/src/single_byte.rs
++++ b/third_party/rust/encoding_rs/src/single_byte.rs
+@@ -53,6 +53,9 @@ impl SingleByteDecoder {
+ // statically omit the bound check when accessing
+ // `[u16; 128]` with an index
+ // `non_ascii as usize - 0x80usize`.
++ //
++ // Safety: `non_ascii` is a u8 byte >=0x80, from the
invariants
++ // on Utf8Destination::copy_ascii_from_check_space_bmp()
+ let mapped =
+ unsafe { *(self.table.get_unchecked(non_ascii as
usize - 0x80usize)) };
+ // let mapped = self.table[non_ascii as usize -
0x80usize];
+@@ -151,89 +154,112 @@ impl SingleByteDecoder {
+ } else {
+ (DecoderResult::InputEmpty, src.len())
+ };
++ // Safety invariant: converted <= length. Quite often we have
`converted < length`
++ // which will be separately marked.
+ let mut converted = 0usize;
+ 'outermost: loop {
+ match unsafe {
++ // Safety: length is the minimum length, `src/dst + x` will
always be valid for reads/writes of `len - x`
+ ascii_to_basic_latin(
+ src.as_ptr().add(converted),
+ dst.as_mut_ptr().add(converted),
+ length - converted,
+ )
+ } {
+ None => {
+ return (pending, length, length);
+ }
+ Some((mut non_ascii, consumed)) => {
++ // Safety invariant: `converted <= length` upheld,
since this can only consume
++ // up to `length - converted` bytes.
++ //
++ // Furthermore, in this context,
++ // we can assume `converted < length` since this branch
is only ever hit when
++ // ascii_to_basic_latin fails to consume the entire
slice
+ converted += consumed;
+ 'middle: loop {
+ // `converted` doesn't count the reading of
`non_ascii` yet.
+ // Since the non-ASCIIness of `non_ascii` is hidden
from
+ // the optimizer, it can't figure out that it's OK
to
+ // statically omit the bound check when accessing
+ // `[u16; 128]` with an index
+ // `non_ascii as usize - 0x80usize`.
++ //
++ // Safety: We can rely on `non_ascii` being between
`0x80` and `0xFF` due to
++ // the invariants of `ascii_to_basic_latin()`, and
our table has enough space for that.
+ let mapped =
+ unsafe { *(self.table.get_unchecked(non_ascii
as usize - 0x80usize)) };
+ // let mapped = self.table[non_ascii as usize -
0x80usize];
+ if mapped == 0u16 {
+ return (
+ DecoderResult::Malformed(1, 0),
+ converted + 1, // +1 `for non_ascii`
+ converted,
+ );
+ }
+ unsafe {
+- // The bound check has already been performed
++ // Safety: As mentioned above, `converted <
length`
+ *(dst.get_unchecked_mut(converted)) = mapped;
+ }
++ // Safety: `converted <= length` upheld, since
`converted < length` before this
+ converted += 1;
+ // Next, handle ASCII punctuation and non-ASCII
without
+ // going back to ASCII acceleration. Non-ASCII
scripts
+ // use ASCII punctuation, so this avoid going to
+ // acceleration just for punctuation/space and then
+ // failing. This is a significant boost to non-ASCII
+ // scripts.
+ // TODO: Split out Latin converters without this
part
+ // this stuff makes Latin script-conversion slower.
+ if converted == length {
+ return (pending, length, length);
+ }
++ // Safety: We are back to `converted < length`
because of the == above
++ // and can perform this check.
+ let mut b = unsafe {
*(src.get_unchecked(converted)) };
++ // Safety: `converted < length` is upheld for this
loop
+ 'innermost: loop {
+ if b > 127 {
+ non_ascii = b;
+ continue 'middle;
+ }
+ // Testing on Haswell says that we should write
the
+ // byte unconditionally instead of trying to
unread it
+ // to make it part of the next SIMD stride.
+ unsafe {
++ // Safety: `converted < length` is true for
this loop
+ *(dst.get_unchecked_mut(converted)) =
u16::from(b);
+ }
++ // Safety: We are now at `converted <= length`.
We should *not* `continue`
++ // the loop without reverifying
+ converted += 1;
+ if b < 60 {
+ // We've got punctuation
+ if converted == length {
+ return (pending, length, length);
+ }
++ // Safety: we're back to `converted <=
length` because of the == above
+ b = unsafe {
*(src.get_unchecked(converted)) };
++ // Safety: The loop continues as `converted
< length`
+ continue 'innermost;
+ }
+ // We've got markup or ASCII text
+ continue 'outermost;
+ }
+ }
+ }
+ }
+ }
+ }
+
+ pub fn latin1_byte_compatible_up_to(&self, buffer: &[u8]) -> usize {
+ let mut bytes = buffer;
+ let mut total = 0;
+ loop {
+ if let Some((non_ascii, offset)) = validate_ascii(bytes) {
+ total += offset;
++ // Safety: We can rely on `non_ascii` being between `0x80`
and `0xFF` due to
++ // the invariants of `ascii_to_basic_latin()`, and our
table has enough space for that.
+ let mapped = unsafe { *(self.table.get_unchecked(non_ascii
as usize - 0x80usize)) };
+ if mapped != u16::from(non_ascii) {
+ return total;
+@@ -384,114 +410,150 @@ impl SingleByteEncoder {
+ } else {
+ (EncoderResult::InputEmpty, src.len())
+ };
++ // Safety invariant: converted <= length. Quite often we have
`converted < length`
++ // which will be separately marked.
+ let mut converted = 0usize;
+ 'outermost: loop {
+ match unsafe {
++ // Safety: length is the minimum length, `src/dst + x` will
always be valid for reads/writes of `len - x`
+ basic_latin_to_ascii(
+ src.as_ptr().add(converted),
+ dst.as_mut_ptr().add(converted),
+ length - converted,
+ )
+ } {
+ None => {
+ return (pending, length, length);
+ }
+ Some((mut non_ascii, consumed)) => {
++ // Safety invariant: `converted <= length` upheld,
since this can only consume
++ // up to `length - converted` bytes.
++ //
++ // Furthermore, in this context,
++ // we can assume `converted < length` since this branch
is only ever hit when
++ // ascii_to_basic_latin fails to consume the entire
slice
+ converted += consumed;
+ 'middle: loop {
+ // `converted` doesn't count the reading of
`non_ascii` yet.
+ match self.encode_u16(non_ascii) {
+ Some(byte) => {
+ unsafe {
++ // Safety: we're allowed this access
since `converted < length`
+ *(dst.get_unchecked_mut(converted)) =
byte;
+ }
+ converted += 1;
++ // `converted <= length` now
+ }
+ None => {
+ // At this point, we need to know if we
+ // have a surrogate.
+ let high_bits = non_ascii & 0xFC00u16;
+ if high_bits == 0xD800u16 {
+ // high surrogate
+ if converted + 1 == length {
+ // End of buffer. This surrogate is
unpaired.
+ return (
+
EncoderResult::Unmappable('\u{FFFD}'),
+ converted + 1, // +1 `for
non_ascii`
+ converted,
+ );
+ }
++ // Safety: convered < length from
outside the match, and `converted + 1 != length`,
++ // So `converted + 1 < length` as well.
We're in bounds
+ let second =
+ u32::from(unsafe {
*src.get_unchecked(converted + 1) });
+ if second & 0xFC00u32 != 0xDC00u32 {
+ return (
+
EncoderResult::Unmappable('\u{FFFD}'),
+ converted + 1, // +1 `for
non_ascii`
+ converted,
+ );
+ }
+ // The next code unit is a low
surrogate.
+ let astral: char = unsafe {
++ // Safety: We can rely on non_ascii
being 0xD800-0xDBFF since the high bits are 0xD800
++ // Then, (non_ascii << 10 - 0xD800
<< 10) becomes between (0 to 0x3FF) << 10, which is between
++ // 0x400 to 0xffc00. Adding the
0x10000 gives a range of 0x10400 to 0x10fc00. Subtracting the 0xDC00
++ // gives 0x2800 to 0x102000
++ // The second term is between
0xDC00 and 0xDFFF from the check above. This gives a maximum
++ // possible range of (0x10400 +
0xDC00) to (0x102000 + 0xDFFF) which is 0x1E000 to 0x10ffff.
++ // This is in range.
++ //
++ // From a Unicode principles
perspective this can also be verified as we have checked that `non_ascii` is
a high surrogate
++ // (0xD800..=0xDBFF), and that
`second` is a low surrogate (`0xDC00..=0xDFFF`), and we are applying reverse
of the UTC16 transformation
++ // algorithm
<https://en.wikipedia.org/wiki/UTF-16#Code_points_from_U+010000_to_U+10FFFF>,
by applying the high surrogate - 0xD800 to the
++ // high ten bits, and the low
surrogate - 0xDc00 to the low ten bits, and then adding 0x10000
+ ::core::char::from_u32_unchecked(
+ (u32::from(non_ascii) << 10) +
second
+ - (((0xD800u32 << 10) -
0x1_0000u32) + 0xDC00u32),
+ )
+ };
+ return (
+ EncoderResult::Unmappable(astral),
+ converted + 2, // +2 `for
non_ascii` and `second`
+ converted,
+ );
+ }
+ if high_bits == 0xDC00u16 {
+ // Unpaired low surrogate
+ return (
+
EncoderResult::Unmappable('\u{FFFD}'),
+ converted + 1, // +1 `for non_ascii`
+ converted,
+ );
+ }
+ return (
+
EncoderResult::unmappable_from_bmp(non_ascii),
+ converted + 1, // +1 `for non_ascii`
+ converted,
+ );
++ // Safety: This branch diverges, so no need
to uphold invariants on `converted`
+ }
+ }
+ // Next, handle ASCII punctuation and non-ASCII
without
+ // going back to ASCII acceleration. Non-ASCII
scripts
+ // use ASCII punctuation, so this avoid going to
+ // acceleration just for punctuation/space and then
+ // failing. This is a significant boost to non-ASCII
+ // scripts.
+ // TODO: Split out Latin converters without this
part
+ // this stuff makes Latin script-conversion slower.
+ if converted == length {
+ return (pending, length, length);
+ }
++ // Safety: we're back to `converted < length` due
to the == above and can perform
++ // the unchecked read
+ let mut unit = unsafe {
*(src.get_unchecked(converted)) };
+ 'innermost: loop {
++ // Safety: This loop always begins with
`converted < length`, see
++ // the invariant outside and the comment on the
continue below
+ if unit > 127 {
+ non_ascii = unit;
+ continue 'middle;
+ }
+ // Testing on Haswell says that we should write
the
+ // byte unconditionally instead of trying to
unread it
+ // to make it part of the next SIMD stride.
+ unsafe {
++ // Safety: Can rely on converted < length
+ *(dst.get_unchecked_mut(converted)) = unit
as u8;
+ }
+ converted += 1;
++ // `converted <= length` here
+ if unit < 60 {
+ // We've got punctuation
+ if converted == length {
+ return (pending, length, length);
+ }
++ // Safety: `converted < length` due to the
== above. The read is safe.
+ unit = unsafe {
*(src.get_unchecked(converted)) };
++ // Safety: This only happens if `converted
< length`, maintaining it
+ continue 'innermost;
+ }
+ // We've got markup or ASCII text
+ continue 'outermost;
++ // Safety: All other routes to here diverge so
the continue is the only
++ // way to run the innermost loop.
+ }
+ }
+ }
+diff --git a/third_party/rust/encoding_rs/src/x_user_defined.rs
b/third_party/rust/encoding_rs/src/x_user_defined.rs
+index 103c9afba9eb..7af7d5e3d69d 100644
+--- a/third_party/rust/encoding_rs/src/x_user_defined.rs
++++ b/third_party/rust/encoding_rs/src/x_user_defined.rs
+@@ -14,12 +14,13 @@ use crate::variant::*;
+ cfg_if! {
+ if #[cfg(feature = "simd-accel")] {
+ use simd_funcs::*;
+- use packed_simd::u16x8;
++ use core::simd::u16x8;
++ use core::simd::cmp::SimdPartialOrd;
+
+ #[inline(always)]
+ fn shift_upper(unpacked: u16x8) -> u16x8 {
+ let highest_ascii = u16x8::splat(0x7F);
+- unpacked +
unpacked.gt(highest_ascii).select(u16x8::splat(0xF700), u16x8::splat(0))
}
++ unpacked +
unpacked.simd_gt(highest_ascii).select(u16x8::splat(0xF700), u16x8::splat(0))
}
+ } else {
+ }
+ }
+@@ -116,10 +117,15 @@ impl UserDefinedDecoder {
+ let simd_iterations = length >> 4;
+ let src_ptr = src.as_ptr();
+ let dst_ptr = dst.as_mut_ptr();
++ // Safety: This is `for i in 0..length / 16`
+ for i in 0..simd_iterations {
++ // Safety: This is in bounds: length is the minumum valid
length for both src/dst
++ // and i ranges to length/16, so multiplying by 16 will always
be `< length` and can do
++ // a 16 byte read
+ let input = unsafe { load16_unaligned(src_ptr.add(i * 16)) };
+ let (first, second) = simd_unpack(input);
+ unsafe {
++ // Safety: same as above, but this is two consecutive
8-byte reads
+ store8_unaligned(dst_ptr.add(i * 16), shift_upper(first));
+ store8_unaligned(dst_ptr.add((i * 16) + 8),
shift_upper(second));
+ }
+diff --git a/third_party/rust/packed_simd/.cargo-checksum.json
b/third_party/rust/packed_simd/.cargo-checksum.json
+deleted file mode 100644
+index 0d75492f06bc..000000000000
+--- a/third_party/rust/packed_simd/.cargo-checksum.json
++++ /dev/null
+@@ -1 +0,0 @@
+-{"files":{"Cargo.toml":"ae219b55eab1f8cd8c3497d7327ea0e5426dba23d2446f7981ca799ad80b6a52","LICENSE-APACHE":"a60eea817514531668d7e00765731449fe14d059d3249e0bc93b36de45f759f2","LICENSE-MIT":"6485b8ed310d3f0340bf1ad1f47645069ce4069dcc6bb46c7d5c6faf41de1fdb","README.md":"c4ac7027a9ab7d7858aa8957d7454dbfcdbb81e605b6a171f05310cc3cad3762","bors.toml":"dee881dc69b9b7834e4eba5d95c3ed5a416d4628815a167d6a22d4cb4fb064b8","build.rs":"019ed29c43989782d8eec3a961654cfc172d7a7898da4eca8f654700af7e1988","ci/all.sh":"2ae6b2445b4db83833e40b37efd0016c6b9879ee988b9b3ef94db5439a3e1606","ci/android-install-ndk.sh":"bdcf93ba9043ac1184e2c504a3d40c47c6c1601d882e0f0a27a8eb56fbabcb5f","ci/android-install-sdk.sh":"3490432022c5c8f5a115c084f7a9aca1626f96c0c87ffb62019228c4346b47e4","ci/android-sysimage.sh":"ebf4e5daa1f0fe1b2092b79f0f3f161c4c4275cb744e52352c4d81ab451e4c5a","ci/benchmark.sh":"b61d19ef6b90deba8fb79dee74c8b062d94844676293da346da87bb78a9a49a4","ci/deploy_and_run_on_ios_simulator.rs":"ec8ecf82d92072676aa47f0d1a3d021b60a7ae3531153ef12d2ff4541fc294dc","ci/docker/aarch64-linux-android/Dockerfile":"ace2e7d33c87bc0f6d3962a4a3408c04557646f7f51ab99cfbf574906796b016","ci/docker/aarch64-unknown-linux-gnu/Dockerfile":"da88c0d50f16dc08448c7fdf1fa5ed2cbe576acf9e7dd85b5b818621b2a8c702","ci/docker/arm-unknown-linux-gnueabi/Dockerfile":"bb5f8ae890707c128652290ffc544447643bf12037ddd73c6ad6989f848cb380","ci/docker/arm-unknown-linux-gnueabihf/Dockerfile":"1afaefcbc05b740859acd4e067bc92439be6bcbe8f2e9678474fb434bcd398d9","ci/docker/armv7-linux-androideabi/Dockerfile":"370e55d3330a413a3ccf677b3afb3e0ef9018a5fab263faa97ae8ac017fc2286","ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile":"8282ea707a94109beed47a57574755e2d58401735904a03f85fb64c578c53b4f","ci/docker/i586-unknown-linux-gnu/Dockerfile":"49792922269f371bd29da4727e9085101b27be67a6b97755d0196c63317f7abb","ci/docker/i686-unknown-linux-gnu/Dockerfile":"49792922269f371bd29da4727e9085101b27be67a6b97755d0196c63317f7abb","ci/docker/mips-unknown-linux-gnu/Dockerfile":"b2ebc25797612c4f8395fe9d407725156044955bfbcf442036b7f55b43a5f9da","ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile":"b0c1692ac65bc56dd30494b1993d8e929c48cc9c4b92029b7c7592af6d4f9220","ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile":"4e9249c179300138141d0b2b7401b11897f64aed69f541f078c1db4594df2827","ci/docker/mipsel-unknown-linux-musl/Dockerfile":"3164c52b0dcbb01afa78292b15b5c43503ccf0491cf6eb801ec2bf22ae274e52","ci/docker/powerpc-unknown-linux-gnu/Dockerfile":"ae8274309928620a5dd232a46264e05399bb746288ebee3843a71c4162208cc3","ci/docker/powerpc64-unknown-linux-gnu/Dockerfile":"ba5fbc4bf3bb91cd50b407248da31225681efc8f2be7618f4a0ab1219b389508","ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile":"53f97f8b9b5aca7534b9bf9ea48f35175052cd2a560a107e01ad270731c032fc","ci/docker/s390x-unknown-linux-gnu/Dockerfile":"89f5421cf06d817ae94092987e914472ef384ad2d1fff2735be3d8786ba11214","ci/docker/sparc64-unknown-linux-gnu/Dockerfile":"83eba19576486f9d10d7c037d669d72b31a65565a479f30b22aab36aaa2ff8dc","ci/docker/thumbv7neon-linux-androideabi/Dockerfile":"c2decd5591bd7a09378901bef629cd944acf052eb55e4f35b79eb9cb4d62246a","ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile":"51955a8bf3c4d440f47382af6f5426ebff94ab01a04da36175babda9a057740f","ci/docker/wasm32-unknown-unknown/Dockerfile":"b982b421c70db476900df5b60e19ef8815e6c7dae22687225002780cab7b0a76","ci/docker/x86_64-linux-android/Dockerfile":"a17ebdb186ce2dd6b62100b5a439e05a1ab9adab113e2508843e121aaea52992","ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile":"44b6203d9290bfdc53d81219f0937e1110847a23dd982ec8c4de388354f01536","ci/docker/x86_64-unknown-linux-gnu/Dockerfile":"7f4e3ca5fa288ea70edb4d1f75309708cd30b192e2e4444e61c4d5b3b58f89cf","ci/dox.sh":"434e9611c52e389312d2b03564adf09429f10cc76fe66a8644adb104903b87b7","ci/linux-s390x.sh":"d6b732d7795b4ba131326aff893bca6228a7d2eb0e9402f135705413dbbe0dce","ci/linux-sparc64.sh":"c92966838b1ab7ad3b7a344833ee726aba6b647cf5952e56f0ad1ba420b13325","ci/lld-shim.rs":"3d7f71ec23a49e2b67f694a0168786f9a954dda15f5a138815d966643fd3fcc3","ci/max_line_width.sh":"0a1518bba4c9ecaa55694cb2e9930d0e19c265baabf73143f17f9cf285aaa5bb","ci/run-docker.sh":"92e036390ad9b0d16f109579df1b5ced2e72e9afea40c7d011400ebd3a2a90de","ci/run.sh":"9afabc961e0ee83b87201f3fd554c19e5b0c36f3a95d013595e276c9882dd0a4","ci/run_examples.sh":"d1a23c6c35374a0678ba5114b9b8fefd8be0a79e774872a8bf0898d1baca18d0","ci/runtest-android.rs":"145a8e9799a5223975061fe7e586ade5669ee4877a7d7a4cf6b4ab48e8e36c7c","ci/setup_benchmarks.sh":"fae3960023f6f3d1388cd2ad22fdbab4b075f1f29dd4292d7994a20783beb6cf","ci/test-runner-linux":"c8aa6025cff5306f4f31d0c61dc5f9d4dd5a1d189ab613ef8d4c367c694d9ccd","contributing.md":"2d2629310ad4d464c482bdbb5819f0d6ce223c576aeef2cdce6a1f6857085ea5","perf-guide/book.toml":"115a98284126c6b180178b44713314cc494f08a71662ee2ce15cf67f17a51064","perf-guide/src/SUMMARY.md":"3e03bffc991fdc2050f3d51842d72d9d21ea6abab56a3baf3b2d5973a78b89e1","perf-guide/src/ascii.css":"29afb08833b2fe2250f0412e1fa1161a2432a0820a14953c87124407417c741a","perf-guide/src/bound_checks.md":"5e4991ff58a183ef0cd9fdc1feb4cd12d083b44bdf87393bbb0927808ef3ce7d","perf-guide/src/float-math/approx.md":"8c09032fa2d795a0c5db1775826c850d28eb2627846d0965c60ee72de63735ad","perf-guide/src/float-math/fma.md":"311076ba4b741d604a82e74b83a8d7e8c318fcbd7f64c4392d1cf5af95c60243","perf-guide/src/float-math/fp.md":"04153e775ab6e4f0d7837bcc515230d327b04edfa34c84ce9c9e10ebaeef2be8","perf-guide/src/float-math/svml.md":"0798873b8eedaeda5fed62dc91645b57c20775a02d3cd74d8bd06958f1516506","perf-guide/src/introduction.md":"9f5a19e9e6751f25d2daad39891a0cc600974527ec4c8305843f9618910671bd","perf-guide/src/prof/linux.md":"447731eb5de7d69166728fdbc5ecb0c0c9db678ea493b45a592d67dd002184c0","perf-guide/src/prof/mca.md":"f56d54f3d20e7aa4d32052186e8237b03d65971eb5d112802b442570ff11d344","perf-guide/src/prof/profiling.md":"8a650c0fd6ede0964789bb6577557eeef1d8226a896788602ce61528e260e43c","perf-guide/src/target-feature/attribute.md":"615f88dca0a707b6c416fa605435dd6e1fb5361cc639429cbf68cd87624bd78b","perf-guide/src/target-feature/features.md":"17077760ff24c006b606dd21889c53d87228f4311f3ba3a574f9afdeacd86165","perf-guide/src/target-feature/inlining.md":"7ed1d7068d8173a00d84c16cfe5871cd68b9f04f8d0cca2d01ebc84957ebf2f6","perf-guide/src/target-feature/practice.md":"c4b371842e0086df178488fec97f20def8f0c62ee588bcd25fd948b9b1fa227e","perf-guide/src/target-feature/runtime.md":"835425f5ee597fb3e51d36e725a81ebee29f4561231d19563cd4da81dbb1cfcb","perf-guide/src/target-feature/rustflags.md":"01197acf6f0adec8db32b8591811f69cecb6555a2b05dc5d5ec27d0e3f7b065e","perf-guide/src/vert-hor-ops.md":"c6211c0ee91e60552ec592d89d9d957eedc21dee3cbd89e1ad6765ea06a27471","rust-toolchain":"58bea07cb6d97f9cfcd5c8f98b1feca0fb81cce5b0bf29a8e70ed2641956e9a6","rustfmt.toml":"d99a43f3f8ef9e425cf01c333fba9f0051f888f5d87ab4e8f63c2f7d0fe6620f","src/api.rs":"45508c6c0241519fc01a7f00c9105554c24c312c4e46900ef9c75139ea438305","src/api/bit_manip.rs":"27f3097fc0a11e3c4107049d9779e680dcd67407a066704008a6b9c4fd529e05","src/api/bitmask.rs":"058ebc38a2e0363f07a441d3e9a4775aaec57ccb170a0e5d5efa5dc4743ab07b","src/api/cast.rs":"03b94a3d316ac7b7be7068810044911e965e889a0ace7bae762749ca74a92747","src/api/cast/macros.rs":"b0a14d0c83ad2ebb7a275180f6d9e3f2bc312ba57a7d3d6c39fad4e0f20f9408","src/api/cast/v128.rs":"edd0994efac4379dff26e178423a52dbb3ffeb38b1fc97cae975d744c00b4fb6","src/api/cast/v16.rs":"96bd98c2d21b0663abe6c0ab33005b1fa693f3db7ee6795351391343863484da","src/api/cast/v256.rs":"8c31fe91f5e78ef737dfba6979cc1240210cb094a89d284fe459bf8a991ca24b","src/api/cast/v32.rs":"a99a79dd84d2a5e6adf9db98705675915bd03fd1287d489c7fe38e84d7e4a086","src/api/cast/v512.rs":"c0dd526f41ed7b8a71c3743d91267554ec0a0c75834ccc2e3ecb0ef3004af642","src/api/cast/v64.rs":"6572fdba2a1241a6cd666d3f0cce3306cd2cb7e5e236172e59d5d4351c8a88af","src/api/cmp.rs":"357c3a2a09c6d4611c32dd7fa95be2fae933d513e229026ec9b44451a77b884e","src/api/cmp/eq.rs":"60f70f355bae4cb5b17db53204cacc3890f70670611c17df638d4c04f7cc8075","src/api/cmp/ord.rs":"589f7234761c294fa5df8f525bc4acd5a47cdb602207d524a0d4e19804cd9695","src/api/cmp/partial_eq.rs":"902ccb8aa01fd5738b30ba0b712669c21d4801958907e03bad23432c7dba0198","src/api/cmp/partial_ord.rs":"9db0c37d7434cdfc62d8d66912e972fa3d8c115ab2af051a6f45e414bd3e4f1c","src/api/cmp/vertical.rs":"de3d62f38eba817299aa16f1e1939954c9a447e316509397465c2830852ba053","src/api/default.rs":"67bf21c134127d12a7028c8b88a57f0ceee8ccbd74976da8ca74eb9f16a174d5","src/api/fmt.rs":"67fb804bb86b6cd77cf8cd492b5733ce437071b66fe3297278b8a6552c325dda","src/api/fmt/binary.rs":"02b2b287f7404f8a983813cf70c87108c8da3835578b63ab303116885f609413","src/api/fmt/debug.rs":"56e1c3bdc092747344fffaafff9da7163ee7827857f6fb7cb1c9923eca4f6fa0","src/api/fmt/lower_hex.rs":"558fd592f7f485712fb051509cecc7174a21e6bf62e5ce64766e75afc97bb8e1","src/api/fmt/octal.rs":"3b2e70877a4f368c7704f8e254236c014c365c74d93371c1feb5f030e6c66422","src/api/fmt/upper_hex.rs":"2a442f666bc80e22d41f903f881238fe114dd49344c3ed69849250e853cafc5d","src/api/from.rs":"2e599d8329cb05eaf06224cc441355c4b7b51254fc19256619333be8c149d444","src/api/from/from_array.rs":"5d2cc700568376bf6ee1fe5e406da3bc2d488ff155644bf73d06a1349b73fc53","src/api/from/from_vector.rs":"9764371aa9e6005aace74dea14f59e5611a095b7cf42707940924749282c52f0","src/api/hash.rs":"5076ece87969592c876486f5b1ea8affbeaec379d1a14a30859e0aa5592019de","src/api/into_bits.rs":"8f8011627250e23e66b5c0ca641afb079d8232674bb1354140b536bdbea63e55","src/api/into_bits/arch_specific.rs":"e7445021f3908326bfee758835e5fc5ad56aa1baa77fc1c58abe4350c66c670a","src/api/into_bits/macros.rs":"bb4fe99be2af6a21d805efab44c8e4e61a7b2adb42a65504a0cf26d13efdadcd","src/api/into_bits/v128.rs":"145a44922b09a5ca5b62d88a461d327d399a997a15db4b11d7b17e554a9fa4c0","src/api/into_bits/v16.rs":"f4f4f61ba88aa51b158ec56ca3dce234349aea0daf2b3029a14ab5125d1e41e5","src/api/into_bits/v256.rs":"8cea9c5d9809f11323cb7cdc53b83df593fd17caf926251e412ae9777bed547f","src/api/into_bits/v32.rs":"905ba683d342fa32f4202b80bb46530807bd0a5b588f6c2e8c9f475223c47775","src/api/into_bits/v512.rs":"e25afa1fbf088a5d58e7d75d197b6cd4c56637ea28542ba18e46a451f29d04e7","src/api/into_bits/v64.rs":"d6238022ccff7b92e55b3f6017fc269acb6f36330a6d7e8fb389853a0f1b6478","src/api/math.rs":"8b2a2fc651917a850539f993aa0b9e5bf4da67b11685285b8de8cdca311719ec","src/api/math/float.rs":"969a75cdb3743c5ac7cde653d1a7f659ac65f2a5afb004c9928a7b34b79c3e39","src/api/math/float/abs.rs":"5b6b2701e2e11135b7ce58a05052ea8120e10e4702c95d046b9d21b827b26bf8","src/api/math/float/consts.rs":"6302c9261da4291d144d5bb53493cdd073498feb40955fb6860ea3c4d06c978a","src/api/math/float/cos.rs":"4c2dd7173728ef189314f1576c9486e03be21b7da98843b2f9011282a7979e31","src/api/math/float/exp.rs":"7c6d5f1e304f498a01cfa23b92380c815d7da0ad94eae3483783bc377d287eef","src/api/math/float/ln.rs":"54c7583f3df793b39ff57534fade27b41bb992439e5dc178252f5ca3190a3e54","src/api/math/float/mul_add.rs":"62cac77660d20159276d4c9ef066eb90c81cbddb808e8e157182c607625ad2eb","src/api/math/float/mul_adde.rs":"bae056ee9f3a70df39ec3c3b2f6437c65303888a7b843ef1a5bcf1f5aca0e602","src/api/math/float/powf.rs":"9ddb938984b36d39d82a82f862f80df8f7fb013f1d222d45698d41d88472f568","src/api/math/float/recpre.rs":"589225794ff1dbf31158dff660e6d4509ecc8befbb57c633900dea5ac0b840d6","src/api/math/float/rsqrte.rs":"a32abdcc318d7ccc8448231f54d75b884b7cbeb03a7d595713ab6243036f4dbf","src/api/math/float/sin.rs":"cbd3622b7df74f19691743001c8cf747a201f8977ad90542fee915f37dcd1e49","src/api/math/float/sqrt.rs":"0c66d5d63fb08e4d99c6b82a8828e41173aff1ac9fa1a2764a11fac217ccf2ac","src/api/math/float/sqrte.rs":"731e1c9f321b662accdd27dacb3aac2e8043b7aecb2f2161dde733bd9f025362","src/api/math/float/tanh.rs":"e57940434cc05981b086f0f3b92d32caceb38d67b90aebce5d3ed8e07c80538f","src/api/minimal.rs":"1f22bcc528555444e76de569ec0ae2029b9ae9d04805efeafa93369c8098036b","src/api/minimal/iuf.rs":"819cff26d3e196f807645bcc1d79eb27d9f175edb89910f2274d52a1e913cd11","src/api/minimal/mask.rs":"0cae10ae1fc65f5070e686c0c79bfba27b86b33d6c399367bd4848fb367dcec4","src/api/minimal/ptr.rs":"f74d7a4925d7209faebc26ea8315259cb2c08ec65789a70869e595649a9bc39a","src/api/ops.rs":"3e273b277a0f3019d42c3c59ca94a5afd4885d5ae6d2182e5089bbeec9de42ee","src/api/ops/scalar_arithmetic.rs":"d2d5ad897a59dd0787544f927e0e7ca4072c3e58b0f4a2324083312b0d5a21d7","src/api/ops/scalar_bitwise.rs":"482204e459ca6be79568e1c9f70adbe2d2151412ddf122fb2161be8ebb51c40c","src/api/ops/scalar_mask_bitwise.rs":"c250f52042e37b22d57256c80d4604104cfd2fbe2a2e127c676267270ca5d350","src/api/ops/scalar_shifts.rs":"c4773d435c3f9da4454327e6fbb2b5b41a1c0ebb1cca7372e69dc7a344a1b6e4","src/api/ops/vector_arithmetic.rs":"ddca15d09ddeef502c2ed66117a62300ca65d87e959e8b622d767bdf1c307910","src/api/ops/vector_bitwise.rs":"b3968f7005b649edcc22a54e2379b14d5ee19045f2e784029805781ae043b5ee","src/api/ops/vector_float_min_max.rs":"76bf8cb607e2c442923c1da1061a6b80d742d607408033c2a3761161114cf2a0","src/api/ops/vector_int_min_max.rs":"a378789c6ff9b32a51fbd0a97ffd36ed102cd1fe6a067d2b02017c1df342def6","src/api/ops/vector_mask_bitwise.rs":"5052d18517d765415d40327e6e8e55a312daaca0a5e2aec959bfa54b1675f9c8","src/api/ops/vector_neg.rs":"5c62f6b0221983cdbd23cd0a3af3672e6ba1255f0dfe8b19aae6fbd6503e231b","src/api/ops/vector_rotates.rs":"6c3f761d9d551f6365a8a95539ceace4b1a02e0b12d144f34ed68db94e88cff4","src/api/ops/vector_shifts.rs":"e510be14127c0ffd58a2573a39701da3557d66bedec09837ac8bbd44d579da00","src/api/ptr.rs":"8a793251bed6130dcfb2f1519ceaa18b751bbb15875928d0fb6deb5a5e07523a","src/api/ptr/gather_scatter.rs":"3d614f9d5b4ca201a9f7e46af4405e1d2c28ecee1620297c23b52e37b92cc0ea","src/api/reductions.rs":"ae5baca81352ecd44526d6c30c0a1feeda475ec73ddd3c3ec6b14e944e5448ee","src/api/reductions/bitwise.rs":"8bf910ae226188bd15fc7e125f058cd2566b6186fcd0cd8fd020f352c39ce139","src/api/reductions/float_arithmetic.rs":"47a5679896db2cbb56c31372fe42143da015b6beae7db5d2f3a0309ddf427ae1","src/api/reductions/integer_arithmetic.rs":"c2df3cf7493cca4174f2c65aea422a3d20d8a23af03f8d57cef72c19fee8f20d","src/api/reductions/mask.rs":"db83327a950e33a317f37fd33ca4e20c347fb415975ec024f3e23da8509425af","src/api/reductions/min_max.rs":"6af8c9aa45c69961b1b6fc205395f4767d4421869fb105fb3d563c5605fc13cd","src/api/select.rs":"6b07e7e8026df561f7307221a896f0fbb272536f41b9109040ac094c24c69331","src/api/shuffle.rs":"be7faff9b59654926df12897b2f98a4baa7d6acf2af1aaf93d388ba6e96f83ec","src/api/shuffle1_dyn.rs":"bfea5a91905b31444e9ef7ca6eddb7a9606b7e22d3f71bb842eb2795a0346620","src/api/slice.rs":"ee87484e8af329547b9a5d4f2a69e8bed6ea10bbd96270d706083843d4eea2ac","src/api/slice/from_slice.rs":"3735363000737104a8fc5f394ad8c31ec14e885952bd57647dd2a84001aee0a6","src/api/slice/write_to_slice.rs":"79d09c64d00724783c77c42e4583eeec97b18db94cf2ae146b564c3f85cfefd6","src/api/swap_bytes.rs":"05b4262eaade2f63e6cd3b780c19a03aecd2459d4cc4360051fc088887179a6e","src/codegen.rs":"db4f232fb9f5728db310b87dc8c4733be48afacab1053798c06106bef9a42b05","src/codegen/bit_manip.rs":"525ea6ff7ad1e043b6f6136992166f1803ed5563b7f6fc292c1c40257d20e264","src/codegen/llvm.rs":"12e748b4928c3be6cc12b4165c3041a3d0efccf6195338ecd3d88b8fdb0bbcc7","src/codegen/math.rs":"dfcf02ad34e2fdfe22c3f1cc2822001cc895e65031b4d06e585e5047839febb7","src/codegen/math/float.rs":"b2f31f479c5c70a6ff9ad33872c1e65506f72882b77a2e3f9e71c42e92af9355","src/codegen/math/float/abs.rs":"d5aaadcf540bdb9b4264dca6471a255fd7bf509e763bef0239c0144a68466fea","src/codegen/math/float/cos.rs":"17f28d2900c852dca221fa9c92a9cd5fe7fd2df8d427bbc60216c749b2be013d","src/codegen/math/float/cos_pi.rs":"dbaf9f443f9846a491d4ec52210a7b5835dd593b03366e3135b05c37d70f9d6c","src/codegen/math/float/exp.rs":"d300058a4bcc7ae7976f216f81902cd73a9e603ad63880dff3bbc866c27a9f37","src/codegen/math/float/ln.rs":"c851e211e43f8256093ba75b03ae0c307c9962ee66d94f09b4dd80068190cbdf","src/codegen/math/float/macros.rs":"fc9924869ed85e4795983af228cacf23158f4f35919adce16c920ad4a3f0a009","src/codegen/math/float/mul_add.rs":"041a5b69d5991d93ef795351b17560c10faf80b78fd26ad7df42a239b32cf9de","src/codegen/math/float/mul_adde.rs":"d71d5f0f3333b62a7439b823cb7adf5340ea1555ce820fb4a3f4cb922f73f5f5","src/codegen/math/float/powf.rs":"9742c3877f1a5509ca5c9492a40884b6579ba6dd11c26b7112e63f70666b395d","src/codegen/math/float/sin.rs":"0e9868d35531566509f3a01d85d5253045eb4afa8525d8407dcc1f5f33c56036","src/codegen/math/float/sin_cos_pi.rs":"8e6b6142d7dd240cdb36669722e82ab9810a2261e86e659f7d97a942ad8b1258","src/codegen/math/float/sin_pi.rs":"bb6d39db8f921e03a301fc5206ac1a61a97def8a2cb83b87ccf189f3fc48d548","src/codegen/math/float/sqrt.rs":"e6ebb0c5f428efad1f672b9a8fe4e58534dbf1ea5a8fe092ce5ce76b52fe89cb","src/codegen/math/float/sqrte.rs":"23acfaea38d0e081a6d9021c1094e813d0cfd12c58c1eca9662aade5e625d51c","src/codegen/math/float/tanh.rs":"816fd107f134920fb1a21cd792029d4b89306f6cf16d6f030cc1136823b033e7","src/codegen/pointer_sized_int.rs":"6ca13c214b6cf7e0929dbe18e96a16fc0bb7d8799608df29c4c8115490f99e01","src/codegen/reductions.rs":"8eb18ebac76985d2aa30262a2edd8cb004230b511a765d657525f677a585c12c","src/codegen/reductions/mask.rs":"e67f35a1f4d156a4894a2d6ea5a935b4d898cf70eefb2715f5c1cc165e776c11","src/codegen/reductions/mask/aarch64.rs":"84b101c17cad1ede4eb6d38cada0ac7da239dba8cea3badd3829b967e558431f","src/codegen/reductions/mask/arm.rs":"aaa07129bd078ae7e677cf8b8e67ec9f30536606a0c7ed1baaa18fd1793bb218","src/codegen/reductions/mask/fallback.rs":"3eb9319d2c7cf19216b607b8459612c4e027b643cf11b036937d36896bf76786","src/codegen/reductions/mask/fallback_impl.rs":"76547f396e55ef403327c77c314cf8db8c7a5c9b9819bfb925abeacf130249e5","src/codegen/reductions/mask/x86.rs":"36dcd8af4ab99730a078ed113d3955f74eb1a2876e2e6d9f224e0ff462c216d1","src/codegen/reductions/mask/x86/avx.rs":"3a40868b38c86e35aefb96d7578de6322efe89d8135e0366359b54ddd06f861a","src/codegen/reductions/mask/x86/avx2.rs":"677aed3f056285285daa3adff8bc65e739630b4424defa6d9665e160f027507e","src/codegen/reductions/mask/x86/sse.rs":"8522f6ed03f6c32dd577d4298df477c08aeaaa38563706f29096e1911ed731f2","src/codegen/reductions/mask/x86/sse2.rs":"54ec56e49b0c6841eccb719e4f310d65fe767c04136b2ec20bd8b9d7d9897b9e","src/codegen/shuffle.rs":"1ec2930f4e1acc43ac30b518af298d466a79e9e75734a51c380b7810efd1a27f","src/codegen/shuffle1_dyn.rs":"3f13ca1597378758d05106bf5ff3715eee531f3cb6d88f48b9182bd6c9386b51","src/codegen/swap_bytes.rs":"c67c86e91ca3fc77539e0efcea081a3c62548cccf503963ae408f2e86f4e6a21","src/codegen/v128.rs":"94226b31ec403d18d9d2fe06713f147c9c79e9b5f9105089088266313f843185","src/codegen/v16.rs":"ddec4ffb66b6f7aaffb9a1780c5ddba82557abd74f45073d335047e04cf74924","src/codegen/v256.rs":"6b63917f0444118d6b1595bff2045e59b97c4d24012bd575f69f1f0efc5a0241","src/codegen/v32.rs":"3477b3c5540aed86e61e2f5807dd31db947413cec9181c587d93ed6ec74f0eba","src/codegen/v512.rs":"5854f99d3aabc4cd42b28a20d9ce447756dc2ba024a409a69b6a8ae1f1842fc5","src/codegen/v64.rs":"e9e89caebfe63d10c0cbca61e4dfdba3b7e02ee0989170f80beed23237ddd950","src/codegen/vPtr.rs":"f0753b405cdc865bdf8e82c6505f299ea1f96136239ebbaf7f9ce93d310764b8","src/codegen/vSize.rs":"c89f5fdeb28ac4c8272ed1816fce03d9d95308cc32bb2533bd8b20cd5ac102ac","src/lib.rs":"05048c6a85ec65cf902d9dd8f757a3f76392b703a6794ea71f0d41500a89f78f","src/masks.rs":"70fc0abe4c2907ce2a491c574e1cfb9f3423385da2e1a923a48c9c13f8ba6ed8","src/sealed.rs":"ae7fdeaf5d84cd7710ed730ca72ca7eaba93df6cb0acb183e5c0a7327acf197f","src/testing.rs":"896669c08d8c801448a4d2fadc9d633eda0fbe879d229997e2a182e31278e469","src/testing/macros.rs":"403bbc5ecb7c786fe36156df302d0c07a8122408dbb15f7474d7682224ba1106","src/testing/utils.rs":"41912a92266dfe884647fc035e4242fd746100df8e839808ae0397af3759a3c8","src/v128.rs":"16cf9a8e7156b899ee9b9cd3f2dba9d13ec63289bea8c3ee9ae2e43ad9510288","src/v16.rs":"cb6465cf1e00bf530183af1819b9fe3d7eec978f8765d5e85d9b58a39a4b4045","src/v256.rs":"fe235017da18c7f3c361831c60e3173ad304d8ea1e95d64ebebc79da2d708511","src/v32.rs":"145d347855bac59b2de6508f9e594654e6c330423af9edc0e2ac8f4d1abdf45e","src/v512.rs":"f372f277f3e62eb5c945bb1c460333fdb17b6974fcc876633788ff53bded9599","src/v64.rs":"0b8079881b71575e3414be0b7f8f7eaba65281ba6732f2b2f61f73e95b6f48f7","src/vPtr.rs":"8b3e433d487180bb4304ff71245ecad90f0010f43e139a72027b672abe58facc","src/vSize.rs":"eda5aa020706cbf94d15bada41a0c2a35fc8f3f37cb7c2cd6f34d201399a495e","tests/endianness.rs":"5147f86d224c4c540b772033da2f994cad9bc9c035f38ec21e23bc4e55f8a759"},"package":"1f9f08af0c877571712e2e3e686ad79efad9657dbf0f7c3c8ba943ff6c38932d"}
+\ No newline at end of file
+diff --git a/third_party/rust/packed_simd/Cargo.toml
b/third_party/rust/packed_simd/Cargo.toml
+deleted file mode 100644
+index 77fc096b0552..000000000000
+--- a/third_party/rust/packed_simd/Cargo.toml
++++ /dev/null
+@@ -1,83 +0,0 @@
+-# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
+-#
+-# When uploading crates to the registry Cargo will automatically
+-# "normalize" Cargo.toml files for maximal compatibility
+-# with all versions of Cargo and also rewrite `path` dependencies
+-# to registry (e.g., crates.io) dependencies.
+-#
+-# If you are reading this file be aware that the original Cargo.toml
+-# will likely look very different (and much more reasonable).
+-# See Cargo.toml.orig for the original contents.
+-
+-[package]
+-edition = "2018"
+-name = "packed_simd"
+-version = "0.3.9"
+-build = "build.rs"
+-description = "Portable Packed SIMD vectors"
+-homepage = "https://github.com/rust-lang/packed_simd"
+-documentation = "https://docs.rs/crate/packed_simd/"
+-readme = "README.md"
+-keywords = [
+- "simd",
+- "vector",
+- "portability",
+-]
+-categories = [
+- "hardware-support",
+- "concurrency",
+- "no-std",
+- "data-structures",
+-]
+-license = "MIT OR Apache-2.0"
+-repository = "https://github.com/rust-lang/packed_simd"
+-
+-[package.metadata.docs.rs]
+-features = ["into_bits"]
+-rustdoc-args = [
+- "--cfg",
+- "doc_cfg",
+-]
+-
+-[dependencies.cfg-if]
+-version = "1.0.0"
+-
+-[dependencies.core_arch]
+-version = "0.1.5"
+-optional = true
+-
+-[dependencies.num-traits]
+-version = "0.2.14"
+-features = ["libm"]
+-default-features = false
+-
+-[dev-dependencies.arrayvec]
+-version = "^0.5"
+-default-features = false
+-
+-[dev-dependencies.paste]
+-version = "^1"
+-
+-[features]
+-default = []
+-into_bits = []
+-libcore_neon = []
+-
+-[target."cfg(target_arch = \"x86_64\")".dependencies.sleef-sys]
+-version = "0.1.2"
+-optional = true
+-
+-[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen]
+-version = "=0.2.87"
+-
+-[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen-test]
+-version = "=0.3.37"
+-
+-[badges.is-it-maintained-issue-resolution]
+-repository = "rust-lang/packed_simd"
+-
+-[badges.is-it-maintained-open-issues]
+-repository = "rust-lang/packed_simd"
+-
+-[badges.maintenance]
+-status = "experimental"
+diff --git a/third_party/rust/packed_simd/README.md
b/third_party/rust/packed_simd/README.md
+deleted file mode 100644
+index 59db13fe4f94..000000000000
+--- a/third_party/rust/packed_simd/README.md
++++ /dev/null
+@@ -1,144 +0,0 @@
+-# `Simd<[T; N]>`
+-
+-## Implementation of [Rust RFC #2366: `std::simd`][rfc2366]
+-
+-[![Latest Version]][crates.io] [![docs]][master_docs]
+-
+-**WARNING**: this crate only supports the most recent nightly Rust toolchain
+-and will be superseded by
[`#![feature(portable_simd)]`](https://github.com/rust-lang/portable-simd).
+-
+-## Documentation
+-
+-* [API docs (`master` branch)][master_docs]
+-* [Performance guide][perf_guide]
+-* [API docs (`docs.rs`)][docs.rs]
+-* [RFC2366 `std::simd`][rfc2366]: - contains motivation, design rationale,
+- discussion, etc.
+-
+-## Examples
+-
+-Most of the examples come with both a scalar and a vectorized
implementation.
+-
+-*
[`aobench`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/aobench)
+-*
[`fannkuch_redux`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/fannkuch_redux)
+-* [`matrix
inverse`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/matrix_inverse)
+-*
[`mandelbrot`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/mandelbrot)
+-*
[`n-body`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/nbody)
+-*
[`options_pricing`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/options_pricing)
+-*
[`spectral_norm`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/spectral_norm)
+-* [`triangle
transform`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/triangle_xform)
+-*
[`stencil`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/stencil)
+-* [`vector dot
product`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/dot_product)
+-
+-## Cargo features
+-
+-* `into_bits` (default: disabled): enables `FromBits`/`IntoBits` trait
+- implementations for the vector types. These allow reinterpreting the bits
of a
+- vector type as those of another vector type safely by just using the
+- `.into_bits()` method.
+-
+-## Performance
+-
+-The following [ISPC] examples are also part of `packed_simd`'s
+-[`examples/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/)
+-directory, where `packed_simd`+[`rayon`][rayon] are used to emulate [ISPC]'s
+-Single-Program-Multiple-Data (SPMD) programming model. The performance
results
+-on different hardware is shown in the `readme.md` of each example. The
following
+-table summarizes the performance ranges, where `+` means speed-up and `-`
+-slowdown:
+-
+-* `aobench`: `[-1.02x, +1.53x]`,
+-* `stencil`: `[+1.06x, +1.72x]`,
+-* `mandelbrot`: `[-1.74x, +1.2x]`,
+-* `options_pricing`:
+- * `black_scholes`: `+1.0x`
+- * `binomial_put`: `+1.4x`
+-
+- While SPMD is not the intended use case for `packed_simd`, it is possible
to
+- combine the library with [`rayon`][rayon] to poorly emulate [ISPC]'s SPMD
programming
+- model in Rust. Writing performant code is not as straightforward as with
+- [ISPC], but with some care (e.g. see the [Performance Guide][perf_guide])
one
+- can easily match and often out-perform [ISPC]'s "default performance".
+-
+-## Platform support
+-
+-The following table describes the supported platforms: `build` shows whether
+-the library compiles without issues for a given target, while `run` shows
+-whether the test suite passes for a given target.
+-
+-| **Linux** | **build** | **run** |
+-|---------------------------------------|-----------|---------|
+-| `i586-unknown-linux-gnu` | ✓ | ✗ |
+-| `i686-unknown-linux-gnu` | ✓ | ✗ |
+-| `x86_64-unknown-linux-gnu` | ✓ | ✓ |
+-| `arm-unknown-linux-gnueabihf` | ✓ | ✓ |
+-| `armv7-unknown-linux-gnueabi` | ✓ | ✓ |
+-| `aarch64-unknown-linux-gnu` | ✓ | ✓ |
+-| `powerpc-unknown-linux-gnu` | ✓ | ✗ |
+-| `powerpc64-unknown-linux-gnu` | ✓ | ✗ |
+-| `powerpc64le-unknown-linux-gnu` | ✓ | ✓ |
+-| `s390x-unknown-linux-gnu` | ✓ | ✗ |
+-| `sparc64-unknown-linux-gnu` | ✓ | ✗ |
+-| `thumbv7neon-unknown-linux-gnueabihf` | ✓ | ✓ |
+-| **MacOSX** | **build** | **run** |
+-| `x86_64-apple-darwin` | ✓ | ✓ |
+-| **Android** | **build** | **run** |
+-| `x86_64-linux-android` | ✓ | ✓ |
+-| `armv7-linux-androideabi` | ✓ | ✗ |
+-| `aarch64-linux-android` | ✓ | ✗ |
+-| `thumbv7neon-linux-androideabi` | ✓ | ✗ |
+-| **iOS** | **build** | **run** |
+-| `x86_64-apple-ios` | ✗ | ✗ |
+-| `aarch64-apple-ios` | ✗ | ✗ |
+-
+-
+-## Machine code verification
+-
+-The
+-[`verify/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/verify)
+-crate tests disassembles the portable packed vector APIs at run-time and
+-compares the generated machine code against the desired one to make sure
that
+-this crate remains efficient.
+-
+-## License
+-
+-This project is licensed under either of
+-
+-* [Apache License, Version 2.0](http://www.apache.org/licenses/LICENSE-2.0)
+- ([LICENSE-APACHE](LICENSE-APACHE))
+-
+-* [MIT License](http://opensource.org/licenses/MIT)
+- ([LICENSE-MIT](LICENSE-MIT))
+-
+-at your option.
+-
+-## Contributing
+-
+-We welcome all people who want to contribute.
+-Please see the [contributing instructions] for more information.
+-
+-Contributions in any form (issues, pull requests, etc.) to this project
+-must adhere to Rust's [Code of Conduct].
+-
+-Unless you explicitly state otherwise, any contribution intentionally
submitted
+-for inclusion in `packed_simd` by you, as defined in the Apache-2.0
license, shall be
+-dual licensed as above, without any additional terms or conditions.
+-
+-[travis]: https://travis-ci.com/rust-lang/packed_simd
+-[Travis-CI Status]: https://travis-ci.com/rust-lang/packed_simd.svg?branch=master
+-[appveyor]: https://ci.appveyor.com/project/gnzlbg/packed-simd
+-[Appveyor Status]: https://ci.appveyor.com/api/projects/status/hd7v9dvr442hgdix?svg=true
+-[Latest Version]: https://img.shields.io/crates/v/packed_simd.svg
+-[crates.io]: https://crates.io/crates/packed_simd
+-[docs]: https://docs.rs/packed_simd/badge.svg
+-[docs.rs]: https://docs.rs/packed_simd
+-[master_docs]: https://rust-lang-nursery.github.io/packed_simd/packed_simd/
+-[perf_guide]: https://rust-lang-nursery.github.io/packed_simd/perf-guide/
+-[rfc2366]: https://github.com/rust-lang/rfcs/pull/2366
+-[ISPC]: https://ispc.github.io/
+-[rayon]: https://crates.io/crates/rayon
+-[boost_license]: https://www.boost.org/LICENSE_1_0.txt
+-[SLEEF]: https://sleef.org/
+-[sleef_sys]: https://crates.io/crates/sleef-sys
+-[contributing instructions]: contributing.md
+-[Code of Conduct]: https://www.rust-lang.org/en-US/conduct.html
+diff --git a/third_party/rust/packed_simd/bors.toml
b/third_party/rust/packed_simd/bors.toml
+deleted file mode 100644
+index 6d302dc85cf6..000000000000
+--- a/third_party/rust/packed_simd/bors.toml
++++ /dev/null
+@@ -1,3 +0,0 @@
+-status = [
+- "continuous-integration/travis-ci/push"
+-]
+\ No newline at end of file
+diff --git a/third_party/rust/packed_simd/build.rs
b/third_party/rust/packed_simd/build.rs
+deleted file mode 100644
+index e87298a2de23..000000000000
+--- a/third_party/rust/packed_simd/build.rs
++++ /dev/null
+@@ -1,6 +0,0 @@
+-fn main() {
+- let target = std::env::var("TARGET").expect("TARGET environment
variable not defined");
+- if target.contains("neon") {
+- println!("cargo:rustc-cfg=libcore_neon");
+- }
+-}
+diff --git a/third_party/rust/packed_simd/ci/all.sh
b/third_party/rust/packed_simd/ci/all.sh
+deleted file mode 100755
+index 55a1fa2efefe..000000000000
+--- a/third_party/rust/packed_simd/ci/all.sh
++++ /dev/null
+@@ -1,71 +0,0 @@
+-#!/usr/bin/env bash
+-#
+-# Performs an operation on all targets
+-
+-set -ex
+-
+-: "${1?The all.sh script requires one argument.}"
+-
+-op=$1
+-
+-cargo_clean() {
+- cargo clean
+-}
+-
+-cargo_check_fmt() {
+- cargo fmt --all -- --check
+-}
+-
+-cargo_fmt() {
+- cargo fmt --all
+-}
+-
+-cargo_clippy() {
+- cargo clippy --all -- -D clippy::perf
+-}
+-
+-CMD="-1"
+-
+-case $op in
+- clean*)
+- CMD=cargo_clean
+- ;;
+- check_fmt*)
+- CMD=cargo_check_fmt
+- ;;
+- fmt*)
+- CMD=cargo_fmt
+- ;;
+- clippy)
+- CMD=cargo_clippy
+- ;;
+- *)
+- echo "Unknown operation: \"${op}\""
+- exit 1
+- ;;
+-esac
+-
+-echo "Operation is: ${CMD}"
+-
+-# On src/
+-$CMD
+-
+-# Check examples/
+-for dir in examples/*/
+-do
+- dir=${dir%*/}
+- (
+- cd "${dir%*/}"
+- $CMD
+- )
+-done
+-
+-(
+- cd verify/verify
+- $CMD
+-)
+-
+-(
+- cd micro_benchmarks
+- $CMD
+-)
+diff --git a/third_party/rust/packed_simd/ci/android-install-ndk.sh
b/third_party/rust/packed_simd/ci/android-install-ndk.sh
+deleted file mode 100644
+index 5370853937c7..000000000000
+--- a/third_party/rust/packed_simd/ci/android-install-ndk.sh
++++ /dev/null
+@@ -1,21 +0,0 @@
+-#!/usr/bin/env sh
+-# Copyright 2016 The Rust Project Developers. See the COPYRIGHT
+-# file at the top-level directory of this distribution and at
+-# http://rust-lang.org/COPYRIGHT.
+-#
+-# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+-# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+-# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+-# option. This file may not be copied, modified, or distributed
+-# except according to those terms.
+-
+-set -ex
+-
+-ANDROID_NDK_URL=https://dl.google.com/android/repository
+-ANDROID_NDK_ARCHIVE=android-ndk-r25b-linux.zip
+-
+-curl -fO "$ANDROID_NDK_URL/$ANDROID_NDK_ARCHIVE"
+-unzip -q $ANDROID_NDK_ARCHIVE
+-rm $ANDROID_NDK_ARCHIVE
+-mv android-ndk-* ndk
+-rm -rf android-ndk-*
+diff --git a/third_party/rust/packed_simd/ci/android-install-sdk.sh
b/third_party/rust/packed_simd/ci/android-install-sdk.sh
+deleted file mode 100644
+index 6b5ac09ab04a..000000000000
+--- a/third_party/rust/packed_simd/ci/android-install-sdk.sh
++++ /dev/null
+@@ -1,60 +0,0 @@
+-#!/usr/bin/env sh
+-# Copyright 2016 The Rust Project Developers. See the COPYRIGHT
+-# file at the top-level directory of this distribution and at
+-# http://rust-lang.org/COPYRIGHT.
+-#
+-# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+-# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+-# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+-# option. This file may not be copied, modified, or distributed
+-# except according to those terms.
+-
+-set -ex
+-
+-# Prep the SDK and emulator
+-#
+-# Note that the update process requires that we accept a bunch of licenses,
and
+-# we can't just pipe `yes` into it for some reason, so we take the same
strategy
+-# located in https://github.com/appunite/docker by just wrapping it in a
script
+-# which apparently magically accepts the licenses.
+-
+-mkdir sdk
+-curl --retry 5 https://dl.google.com/android/repository/sdk-tools-linux-3859397.zip -O
+-unzip -d sdk sdk-tools-linux-3859397.zip
+-
+-case "$1" in
+- arm | armv7)
+- abi=armeabi-v7a
+- ;;
+-
+- aarch64)
+- abi=arm64-v8a
+- ;;
+-
+- i686)
+- abi=x86
+- ;;
+-
+- x86_64)
+- abi=x86_64
+- ;;
+-
+- *)
+- echo "invalid arch: $1"
+- exit 1
+- ;;
+-esac;
+-
+-# --no_https avoids
+- # javax.net.ssl.SSLHandshakeException:
sun.security.validator.ValidatorException: No trusted certificate found
+-yes | ./sdk/tools/bin/sdkmanager --licenses --no_https
+-yes | ./sdk/tools/bin/sdkmanager --no_https \
+- "emulator" \
+- "platform-tools" \
+- "platforms;android-24" \
+- "system-images;android-24;default;$abi"
+-
+-echo "no" |
+- ./sdk/tools/bin/avdmanager create avd \
+- --name "${1}" \
+- --package "system-images;android-24;default;$abi"
+diff --git a/third_party/rust/packed_simd/ci/android-sysimage.sh
b/third_party/rust/packed_simd/ci/android-sysimage.sh
+deleted file mode 100644
+index 9eabd7c8d94f..000000000000
+--- a/third_party/rust/packed_simd/ci/android-sysimage.sh
++++ /dev/null
+@@ -1,56 +0,0 @@
+-#!/usr/bin/env bash
+-
+-# Copyright 2017 The Rust Project Developers. See the COPYRIGHT
+-# file at the top-level directory of this distribution and at
+-# http://rust-lang.org/COPYRIGHT.
+-#
+-# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+-# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+-# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+-# option. This file may not be copied, modified, or distributed
+-# except according to those terms.
+-
+-set -ex
+-
+-URL=https://dl.google.com/android/repository/sys-img/android
+-
+-main() {
+- local arch="${1}"
+- local name="${2}"
+- local dest=/system
+- local td
+- td="$(mktemp -d)"
+-
+- apt-get install --no-install-recommends e2tools
+-
+- pushd "${td}"
+- curl --retry 5 -O "${URL}/${name}"
+- unzip -q "${name}"
+-
+- local system
+- system="$(find . -name system.img)"
+- mkdir -p ${dest}/{bin,lib,lib64}
+-
+- # Extract android linker and libraries to /system
+- # This allows android executables to be run directly (or with qemu)
+- if [ "${arch}" = "x86_64" ] || [ "${arch}" = "arm64" ]; then
+- e2cp -p "${system}:/bin/linker64" "${dest}/bin/"
+- e2cp -p "${system}:/lib64/libdl.so" "${dest}/lib64/"
+- e2cp -p "${system}:/lib64/libc.so" "${dest}/lib64/"
+- e2cp -p "${system}:/lib64/libm.so" "${dest}/lib64/"
+- else
+- e2cp -p "${system}:/bin/linker" "${dest}/bin/"
+- e2cp -p "${system}:/lib/libdl.so" "${dest}/lib/"
+- e2cp -p "${system}:/lib/libc.so" "${dest}/lib/"
+- e2cp -p "${system}:/lib/libm.so" "${dest}/lib/"
+- fi
+-
+- # clean up
+- apt-get purge --auto-remove -y e2tools
+-
+- popd
+-
+- rm -rf "${td}"
+-}
+-
+-main "${@}"
+diff --git a/third_party/rust/packed_simd/ci/benchmark.sh
b/third_party/rust/packed_simd/ci/benchmark.sh
+deleted file mode 100755
+index 3635b9e371d1..000000000000
+--- a/third_party/rust/packed_simd/ci/benchmark.sh
++++ /dev/null
+@@ -1,32 +0,0 @@
+-#!/usr/bin/env bash
+-#
+-# Runs all benchmarks. Controlled by the following environment variables:
+-#
+-# FEATURES={} - cargo features to pass to all benchmarks (e.g.
core_arch,sleef-sys,ispc)
+-# NORUN={1} - only builds the benchmarks
+-
+-set -ex
+-
+-if [[ ${NORUN} != 1 ]]; then
+- # Most benchmarks require hyperfine; require it upfront.
+- hash hyperfine 2>/dev/null || { echo >&2 "hyperfine is not in PATH.";
exit 1; }
+-fi
+-
+-
+-# If the ispc benchmark feature is enabled, ispc must be in the path of the
+-# benchmarks.
+-if echo "$FEATURES" | grep -q "ispc"; then
+- hash ispc 2>/dev/null || { echo >&2 "ispc is not in PATH."; exit 1; }
+-fi
+-
+-# An example with a benchmark.sh is a benchmark:
+-for dir in examples/*/
+-do
+- dir=${dir%*/}
+- cd ${dir%*/}
+- if [ -f "benchmark.sh" ]; then
+- ./benchmark.sh
+- fi
+- cd -
+-done
+-
+diff --git
a/third_party/rust/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
b/third_party/rust/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
+deleted file mode 100644
+index c0fe52c35659..000000000000
+--- a/third_party/rust/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
++++ /dev/null
+@@ -1,176 +0,0 @@
+-// Copyright 2017 The Rust Project Developers. See the COPYRIGHT
+-// file at the top-level directory of this distribution and at
+-// http://rust-lang.org/COPYRIGHT.
+-//
+-// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+-// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+-// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+-// option. This file may not be copied, modified, or distributed
+-// except according to those terms.
+-
+-// This is a script to deploy and execute a binary on an iOS simulator.
+-// The primary use of this is to be able to run unit tests on the simulator
and
+-// retrieve the results.
+-//
+-// To do this through Cargo instead, use Dinghy
+-// (https://github.com/snipsco/dinghy): cargo dinghy install, then cargo
dinghy
+-// test.
+-
+-use std::env;
+-use std::fs::{self, File};
+-use std::io::Write;
+-use std::path::Path;
+-use std::process;
+-use std::process::Command;
+-
+-macro_rules! t {
+- ($e:expr) => (match $e {
+- Ok(e) => e,
+- Err(e) => panic!("{} failed with: {}", stringify!($e), e),
+- })
+-}
+-
+-// Step one: Wrap as an app
+-fn package_as_simulator_app(crate_name: &str, test_binary_path: &Path) {
+- println!("Packaging simulator app");
+- drop(fs::remove_dir_all("ios_simulator_app"));
+- t!(fs::create_dir("ios_simulator_app"));
+- t!(fs::copy(test_binary_path,
+- Path::new("ios_simulator_app").join(crate_name)));
+-
+- let mut f = t!(File::create("ios_simulator_app/Info.plist"));
+- t!(f.write_all(format!(r#"
+- <?xml version="1.0" encoding="UTF-8"?>
+- <!DOCTYPE plist PUBLIC
+- "-//Apple//DTD PLIST 1.0//EN"
+- "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
+- <plist version="1.0">
+- <dict>
+- <key>CFBundleExecutable</key>
+- <string>{}</string>
+- <key>CFBundleIdentifier</key>
+- <string>com.rust.unittests</string>
+- </dict>
+- </plist>
+- "#, crate_name).as_bytes()));
+-}
+-
+-// Step two: Start the iOS simulator
+-fn start_simulator() {
+- println!("Looking for iOS simulator");
+- let output =
t!(Command::new("xcrun").arg("simctl").arg("list").output());
+- assert!(output.status.success());
+- let mut simulator_exists = false;
+- let mut simulator_booted = false;
+- let mut found_rust_sim = false;
+- let stdout = t!(String::from_utf8(output.stdout));
+- for line in stdout.lines() {
+- if line.contains("rust_ios") {
+- if found_rust_sim {
+- panic!("Duplicate rust_ios simulators found. Please \
+- double-check xcrun simctl list.");
+- }
+- simulator_exists = true;
+- simulator_booted = line.contains("(Booted)");
+- found_rust_sim = true;
+- }
+- }
+-
+- if simulator_exists == false {
+- println!("Creating iOS simulator");
+- Command::new("xcrun")
+- .arg("simctl")
+- .arg("create")
+- .arg("rust_ios")
+- .arg("com.apple.CoreSimulator.SimDeviceType.iPhone-SE")
+- .arg("com.apple.CoreSimulator.SimRuntime.iOS-10-2")
+- .check_status();
+- } else if simulator_booted == true {
+- println!("Shutting down already-booted simulator");
+- Command::new("xcrun")
+- .arg("simctl")
+- .arg("shutdown")
+- .arg("rust_ios")
+- .check_status();
+- }
+-
+- println!("Starting iOS simulator");
+- // We can't uninstall the app (if present) as that will hang if the
+- // simulator isn't completely booted; just erase the simulator instead.
+-
Command::new("xcrun").arg("simctl").arg("erase").arg("rust_ios").check_status();
+-
Command::new("xcrun").arg("simctl").arg("boot").arg("rust_ios").check_status();
+-}
+-
+-// Step three: Install the app
+-fn install_app_to_simulator() {
+- println!("Installing app to simulator");
+- Command::new("xcrun")
+- .arg("simctl")
+- .arg("install")
+- .arg("booted")
+- .arg("ios_simulator_app/")
+- .check_status();
+-}
+-
+-// Step four: Run the app
+-fn run_app_on_simulator() {
+- println!("Running app");
+- let output = t!(Command::new("xcrun")
+- .arg("simctl")
+- .arg("launch")
+- .arg("--console")
+- .arg("booted")
+- .arg("com.rust.unittests")
+- .output());
+-
+- println!("stdout --\n{}\n", String::from_utf8_lossy(&output.stdout));
+- println!("stderr --\n{}\n", String::from_utf8_lossy(&output.stderr));
+-
+- let stdout = String::from_utf8_lossy(&output.stdout);
+- let failed = stdout.lines()
+- .find(|l| l.contains("FAILED"))
+- .map(|l| l.contains("FAILED"))
+- .unwrap_or(false);
+-
+- let passed = stdout.lines()
+- .find(|l| l.contains("test result: ok"))
+- .map(|l| l.contains("test result: ok"))
+- .unwrap_or(false);
+-
+- println!("Shutting down simulator");
+- Command::new("xcrun")
+- .arg("simctl")
+- .arg("shutdown")
+- .arg("rust_ios")
+- .check_status();
+- if !(passed && !failed) {
+- panic!("tests didn't pass");
+- }
+-}
+-
+-trait CheckStatus {
+- fn check_status(&mut self);
+-}
+-
+-impl CheckStatus for Command {
+- fn check_status(&mut self) {
+- println!("\trunning: {:?}", self);
+- assert!(t!(self.status()).success());
+- }
+-}
+-
+-fn main() {
+- let args: Vec<String> = env::args().collect();
+- if args.len() != 2 {
+- println!("Usage: {} <executable>", args[0]);
+- process::exit(-1);
+- }
+-
+- let test_binary_path = Path::new(&args[1]);
+- let crate_name = test_binary_path.file_name().unwrap();
+-
+- package_as_simulator_app(crate_name.to_str().unwrap(),
test_binary_path);
+- start_simulator();
+- install_app_to_simulator();
+- run_app_on_simulator();
+-}
+diff --git
a/third_party/rust/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
b/third_party/rust/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
+deleted file mode 100644
+index 27bde89c5a8d..000000000000
+--- a/third_party/rust/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
++++ /dev/null
+@@ -1,47 +0,0 @@
+-FROM ubuntu:16.04
+-
+-RUN dpkg --add-architecture i386 && \
+- apt-get update && \
+- apt-get install -y --no-install-recommends \
+- file \
+- make \
+- curl \
+- ca-certificates \
+- python \
+- unzip \
+- expect \
+- openjdk-9-jre \
+- libstdc++6:i386 \
+- libpulse0 \
+- gcc \
+- libc6-dev
+-
+-WORKDIR /android/
+-COPY android* /android/
+-
+-ENV ANDROID_ARCH=aarch64
+-ENV
PATH=$PATH:/android/ndk-$ANDROID_ARCH/bin:/android/sdk/tools:/android/sdk/platform-tools
+-
+-RUN sh /android/android-install-ndk.sh $ANDROID_ARCH
+-RUN sh /android/android-install-sdk.sh $ANDROID_ARCH
+-RUN mv /root/.android /tmp
+-RUN chmod 777 -R /tmp/.android
+-RUN chmod 755 /android/sdk/tools/* /android/sdk/emulator/qemu/linux-x86_64/*
+-
+-ENV PATH=$PATH:/rust/bin \
+- CARGO_TARGET_AARCH64_LINUX_ANDROID_LINKER=aarch64-linux-android-gcc \
+- CARGO_TARGET_AARCH64_LINUX_ANDROID_RUNNER=/tmp/runtest \
+- OBJDUMP=aarch64-linux-android-objdump \
+- HOME=/tmp
+-
+-ADD runtest-android.rs /tmp/runtest.rs
+-ENTRYPOINT [ \
+- "bash", \
+- "-c", \
+- # set SHELL so android can detect a 64bits system, see
+- # http://stackoverflow.com/a/41789144
+- "SHELL=/bin/dash /android/sdk/emulator/emulator @aarch64 -no-window & \
+- rustc /tmp/runtest.rs -o /tmp/runtest && \
+- exec \"$@\"", \
+- "--" \
+-]
+diff --git
a/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
b/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
+deleted file mode 100644
+index 41ff4729ac59..000000000000
+---
a/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
++++ /dev/null
+@@ -1,14 +0,0 @@
+-FROM ubuntu:18.04
+-RUN apt-get update && apt-get install -y --no-install-recommends \
+- gcc \
+- ca-certificates \
+- libc6-dev \
+- gcc-aarch64-linux-gnu \
+- libc6-dev-arm64-cross \
+- qemu-user \
+- make \
+- file
+-
+-ENV CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_LINKER=aarch64-linux-gnu-gcc \
+- CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64 -L
/usr/aarch64-linux-gnu" \
+- OBJDUMP=aarch64-linux-gnu-objdump
+diff --git
a/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
b/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
+deleted file mode 100644
+index e1c591dd979a..000000000000
+---
a/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
++++ /dev/null
+@@ -1,15 +0,0 @@
+-FROM ubuntu:18.04
+-RUN apt-get update && apt-get install -y --no-install-recommends \
+- gcc \
+- ca-certificates \
+- libc6-dev \
+- libc6-armel-cross \
+- libc6-dev-armel-cross \
+- binutils-arm-linux-gnueabi \
+- gcc-arm-linux-gnueabi \
+- qemu-user \
+- make \
+- file
+-ENV CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABI_LINKER=arm-linux-gnueabi-gcc \
+- CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABI_RUNNER="qemu-arm -L
/usr/arm-linux-gnueabi" \
+- OBJDUMP=arm-linux-gnueabi-objdump
+diff --git
a/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile